CSD16415Q5 25-V N-Channel NexFET™ Power MOSFET
- SLPS259A December 2011 – September 2015 CSD16415Q5
  
  PRODUCTION DATA.

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DATA SHEET

CSD16415Q5 25-V N-Channel NexFET™ Power MOSFET

1 Features

Ultralow Q_g and Q_gd
Very Low On-Resistance
Low Thermal Resistance
Avalanche Rated
Pb-Free Terminal Plating
RoHS Compliant
Halogen-Free

2 Applications

Point-of-Load Synchronous Buck Converter for Applications in Networking, Telecom, and Computing Systems
Optimized for Synchronous FET Applications

3 Description

This 25 V, 1.3 mΩ, 5 x 6 mm SON NexFET™ power MOSFET has been designed to minimize losses in power conversion applications.

Top View

Added text for spacing

Product Summary

T_A = 25°C		VALUE		UNIT
V_DS	Drain-to-Source Voltage	25		V
Q_g	Gate Charge, Total (4.5 V)	21		nC
Q_gd	Gate Charge, Gate-to-Drain	5.2		nC
R_DS(on)	Drain-to-Source On Resistance	V_GS= 4.5 V	1.5	mΩ
R_DS(on)	Drain-to-Source On Resistance	V_GS = 10 V	0.99	mΩ
V_GS(th)	Threshold Voltage	1.5		V

Device Information⁽¹⁾

DEVICE	PACKAGE	MEDIA	QTY	SHIP
CSD16415Q5	SON 5-mm × 6-mm Plastic Package	13-inch Reel	2500	Tape and Reel

For all available packages, see the orderable addendum at the end of the data sheet.

Absolute Maximum Ratings

T_A = 25°C		VALUE	UNIT
V_DS	Drain-to-Source Voltage	25	V
V_GS	Gate-to-Source Voltage	–12 to 16	V
I_D	Continuous Drain Current (Package Limited)	100	A
	Continuous Drain Current (Silicon Limited), T_C = 25°C⁽¹⁾	261
	Continuous Drain Current⁽¹⁾	38
I_DM	Pulsed Drain Current, T_A = 25°C⁽²⁾	200	A
P_D	Power dissipation⁽¹⁾	3.2	W
P_D	Power Dissipation, , T_C = 25°C	156	W
T_J, T_stg	Operating Junction and Storage Temperature	–55 to 150	°C
E_AS	Avalanche Energy, Single-Pulse I_D = 100 A, L = 0.1 mH, R_G = 25 Ω	500	mJ

(1) R_θJA = 40°C/W on 1 in² (6.45 cm²) Cu [2 oz. (0.071 mm thick)] on 0.060 inch (1.52 mm) thick FR4 PCB.

(2) Max R_θJC = 0.8°C/W, pulse duration ≤100 μs, duty cycle ≤1%

R_DS(ON) vs V_GS

Gate Charge

4 Revision History

Changes from * Revision (August 2014) to A Revision

Added part number to title Go
Enhanced DescriptionGo
Added Device and Documentation Support section and Mechanical, Packaging, and Orderable Information sectionGo
Updated pulsed current Go
Updated Figure 1 to a normalized R_θJC curveGo
Updated the SOA in Figure 10Go
Deleted Package Marking Information section at the end of the data sheetGo

5 Specifications

5.1 Electrical Characteristics

T_A = 25°C (unless otherwise noted)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
STATIC CHARACTERISTICS
BV_DSS	Drain-to-Source Voltage	V_GS = 0 V, I_D = 250 μA	25			V
I_DSS	Drain-to-Source Leakage Current	V_GS = 0 V, V_DS = 20 V			1	μA
I_GSS	Gate-to-Source Leakage Current	V_DS = 0 V, V_GS = –12 V to 16 V			100	nA
V_GS(th)	Gate-to-Source Threshold Voltage	V_DS = V_GS, I_D = 250 μA	1.2	1.5	1.9	V
R_DS(on)	Drain-to-Source On Resistance	V_GS = 4.5 V, I_D = 40 A		1.5	1.8	mΩ
R_DS(on)	Drain-to-Source On Resistance	V_GS = 10 V, I_D = 40 A		0.99	1.15	mΩ
g_fs	Transconductance	V_DS = 15 V, I_D = 40 A		168		S
DYNAMIC CHARACTERISTICS
C_ISS	Input Capacitance	V_GS = 0 V, V_DS = 12.5 V, ƒ = 1 MHz		3150	4100	pF
C_OSS	Output Capacitance			2530	3300	pF
C_RSS	Reverse Transfer Capacitance			175	230	pF
R_g	Series Gate Resistance			1.2	2.4	Ω
Q_g	Gate Charge Total (4.5 V)	V_DS = 12.5 V, ID = 40 A		21	29	nC
Q_gd	Gate Charge, Gate-to-Drain			5.2		nC
Q_gs	Gate Charge, Gate-to-Source			8.3		nC
Qg(th)	Gate Charge at Vth			4.8		nC
Q_OSS	Output Charge	V_DS = 15 V, V_GS = 0 V		55		nC
t_d(on)	Turnon Delay Time	V_DS = 12.5 V, V_GS = 4.5 V, I_D = 40 A R_G = 2 Ω		16.6		ns
t_r	Rise Time			30		ns
t_d(off)	Turn Off Delay Time			20		ns
t_f	Fall Time			12.7		ns
DIODE CHARACTERISTICS
V_SD	Diode Forward Voltage	I_S = 40 A, V_GS = 0 V		0.85	1	V
Q_rr	Reverse Recovery Charge	V_DD = 15 V, I_F = 40 A, di/dt = 300 A/μs		72		nC
t_rr	Reverse Tecovery Time	V_DD = 15 V, I_F = 40 A, di/dt = 300 A/μs		45		ns

5.2 Thermal Information

T_A = 25°C (unless otherwise noted)

THERMAL METRIC		MIN	TYP	MAX	UNIT
R_θJC	Thermal resistance, junction-to-case⁽¹⁾			0.8	°C/W
R_θJA	Thermal resistance, junction-to-ambient⁽¹⁾ ⁽²⁾			50	°C/W

(1) R_θJC is determined with the device mounted on a 1 inch (2.54 cm) square, 2 oz. (0.071 mm thick) Cu pad on a 1.5 inch × 1.5 inch (3.81 cm × 3.81 cm), 0.060 inch (1.52 mm) thick FR4 board. R_θJC is specified by design, whereas R_θJA is determined by the user’s board design.

(2) Device mounted on FR4 material with 1 inch² (6.45 cm²) of 2 oz. (0.071 mm thick) Cu.

Max R_θJA = 50°C/W when mounted on 1 inch² (6.45 cm²) of 2 oz. (0.071 mm thick) Cu.

Max R_θJA = 125°C/W when mounted on minimum pad area of 2 oz. (0.071 mm thick) Cu.

5.3 Typical MOSFET Characteristics

T_A = 25°C (unless otherwise noted)

Figure 1. Transient Thermal Impedance

Figure 2. Saturation Characteristics

I_D = 40 A

V_DS = 12.5 V

Figure 4. Gate Charge

I_D = 250 µA

Figure 6. Threshold Voltage vs Temperature

I_D = 40 A

Figure 8. On-Resistance vs Temperature

Single Pulse, Max R_θJC = 0.8°C/W

Figure 10. Maximum Safe Operating Area

Figure 12. Maximum Drain Current vs Temperature

Figure 3. Transfer Characteristics

Figure 5. Capacitance

Figure 7. On-Resistance vs Gate Voltage

Figure 9. Typical Diode Forward Voltage

Figure 11. Single-Pulse Unclamped Inductive Switching

6 Device and Documentation Support

6.1 Community Resources

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6.2 Trademarks

NexFET, E2E are trademarks of Texas Instruments.

All other trademarks are the property of their respective owners.

6.3 Electrostatic Discharge Caution

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

6.4 Glossary

SLYZ022 — TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.