CSD16570Q5B 25V N 通道 NexFET功率金属氧化物半导体场效应晶体管 (MOSFET)
- ZHCSCP5A July 2014 – May 2017 CSD16570Q5B
  
  PRODUCTION DATA.

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CSD16570Q5B 25V N 通道 NexFET功率金属氧化物半导体场效应晶体管 (MOSFET)

本资源的原文使用英文撰写。为方便起见，TI 提供了译文；由于翻译过程中可能使用了自动化工具，TI 不保证译文的准确性。为确认准确性，请务必访问 ti.com 参考最新的英文版本（控制文档）。

1 特性

极低电阻
低 Q_g 和 Q_gd
低热阻
雪崩级
无铅引脚镀层
符合 RoHS 标准
无卤素
SON 5mm × 6mm 塑料封装

2 应用范围

ORing 和热插拔应用

3 说明

这款 25V，0.49mΩ，SON 5mm × 6mm NexFET™功率 MOSFET 旨在最大限度地减小 ORing 和热拔插应用的电阻，不适用于开关应用。

顶部图标

米6体育平台手机版_好二三四概要

T_A = 25°C		典型值		单位
V_DS	漏源电压	25		V
Q_g	栅极电荷总量 (4.5V)	95		nC
Q_gd	栅极电荷（栅极到漏极）	31		nC
R_DS(on)	漏源导通电阻	V_GS = 4.5V	0.68	mΩ
R_DS(on)	漏源导通电阻	V_GS = 10V	0.49	mΩ
V_GS(th)	阈值电压	1.5		V

订购信息⁽¹⁾

器件	数量	介质	封装	出货
CSD16570Q5B	2500	13 英寸卷带	SON 5mm x 6mm 塑料封装	卷带封装
CSD16570Q5BT	250	7 英寸卷带	SON 5mm x 6mm 塑料封装	卷带封装

要了解所有可用封装，请参阅数据表末尾的可订购米6体育平台手机版_好二三四附录。

绝对最大额定值

T_A = 25°C		值	单位
V_DS	漏源电压	25	V
V_GS	栅源电压	±20	V
I_D	持续漏极电流（受封装限制）	100	A
	持续漏极电流（受芯片限制），T_C = 25°C 时测得	456
	持续漏极电流⁽¹⁾	59
I_DM	脉冲漏极电流⁽²⁾	400	A
P_D	功率耗散⁽¹⁾	3.2	W
P_D	功率耗散，T_C = 25°C	195	W
T_J， T_stg	运行结温和储存温度范围	-55 至 150	°C
E_AS	雪崩能量，单一脉冲 I_D = 98A，L = 0.1mH，R_G = 25Ω	480	mJ

R_θJA= 40°C/W，这是在一个厚度 0.06 英寸的环氧树脂 (FR4) 印刷电路板 (PCB) 上的 1 英寸²，2 盎司的铜焊盘上测得的典型值
。
最大 R_θJC = 0.8°C/W，脉冲持续时间 ≤ 100μs，占空比 ≤ 1%

R_DS(on) 与 V_GS 对比

栅极电荷

CSD16570Q5B graph04_frontpage_SLPS496.png

4 修订历史记录

Changes from * Revision (July 2014) to A Revision

Added 将接收文档更新通知 和社区资源 部分添加到了器件和文档支持。Go
Changed 在建议 PCB 布局 部分方框图中将焊盘 3 和 4 之间的尺寸从 0.028 英寸更改为了 0.050 英寸Go

5 Specifications

5.1 Electrical Characteristics

(T_A = 25°C unless otherwise stated)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
STATIC CHARACTERISTICS
BV_DSS	Drain-to-Source Voltage	V_GS = 0 V, I_D = 250 μA	25			V
I_DSS	Drain-to-Source Leakage Current	V_GS = 0 V, V_DS = 20 V			1	μA
I_GSS	Gate-to-Source Leakage Current	V_DS = 0 V, V_GS = 20 V			100	nA
V_GS(th)	Gate-to-Source Threshold Voltage	V_DS = V_GS, I_D = 250 μA	1.1	1.5	1.9	V
R_DS(on)	Drain-to-Source On-Resistance	V_GS = 4.5 V, I_D = 50 A		0.68	0.82	mΩ
R_DS(on)	Drain-to-Source On-Resistance	V_GS = 10 V, I_D = 50 A		0.49	0.59	mΩ
g_fs	Transconductance	V_DS = 2.5 V, I_D = 50 A		278		S
DYNAMIC CHARACTERISTICS
C_iss	Input Capacitance	V_GS = 0 V, V_DS = 12 V, ƒ = 1 MHz		10700	14000	pF
C_oss	Output Capacitance			1660	2160	pF
C_rss	Reverse Transfer Capacitance			996	1290	pF
R_G	Series Gate Resistance			1.8	3.6	Ω
Q_g	Gate Charge Total (4.5 V)	V_DS = 12.5 V, I_D = 50 A		95	124	nC
Q_g	Gate Charge Total (10 V)			192	250	nC
Q_gd	Gate Charge Gate-to-Drain			31		nC
Q_gs	Gate Charge Gate-to-Source			29		nC
Q_g(th)	Gate Charge at V_th			15		nC
Q_oss	Output Charge	V_DS = 12.5 V, V_GS = 0 V		35		nC
t_d(on)	Turn On Delay Time	V_DS = 12.5 V, V_GS = 10 V, I_DS = 50 A, R_G = 0 Ω		5		ns
t_r	Rise Time			43		ns
t_d(off)	Turn Off Delay Time			156		ns
t_f	Fall Time			72		ns
DIODE CHARACTERISTICS
V_SD	Diode Forward Voltage	I_SD = 50 A, V_GS = 0 V		0.8	1	V
Q_rr	Reverse Recovery Charge	V_DS= 12.5 V, I_F = 50 A, di/dt = 300A/μs		34		nC
t_rr	Reverse Recovery Time	V_DS= 12.5 V, I_F = 50 A, di/dt = 300A/μs		21		ns

5.2 Thermal Information

(T_A = 25°C unless otherwise stated)

THERMAL METRIC		MIN	TYP	MAX	UNIT
R_θJC	Junction-to-Case Thermal Resistance⁽¹⁾			0.8	°C/W
R_θJA	Junction-to-Ambient Thermal Resistance⁽¹⁾⁽²⁾			50	°C/W

(1) R_θJC is determined with the device mounted on a 1-inch² (6.45-cm²), 2-oz. (0.071-mm thick) Cu pad on a 1.5-inches × 1.5-inches
(3.81-cm × 3.81-cm), 0.06-inch (1.52-mm) thick FR4 PCB. R_θJC is specified by design, whereas R_θJA is determined by the user’s board design.

(2) Device mounted on FR4 material with 1-inch² (6.45-cm²), 2-oz. (0.071-mm thick) Cu.

Max R_θJA = 50°C/W when mounted on 1 inch² (6.45 cm²) of
2-oz. (0.071-mm thick) Cu.

Max R_θJA = 125°C/W when mounted on a minimum pad area of
2-oz. (0.071-mm thick) Cu.

5.3 Typical MOSFET Characteristics

(T_A = 25°C unless otherwise stated)

Figure 1. Transient Thermal Impedance

Figure 2. Saturation Characteristics

	I_D = 50 A	V_DS = 12.5 V

Figure 4. Gate Charge

	I_D = 250 µA

Figure 6. Threshold Voltage vs Temperature

	I_D = 50 A

Figure 8. Normalized On-State Resistance vs Temperature

Single Pulse, Max R_θJC = 0.8°C/W

Figure 10. Maximum Safe Operating Area

Figure 12. Maximum Drain Current vs Temperature

	V_DS = 5 V

Figure 3. Transfer Characteristics

Figure 5. Capacitance

Figure 7. On-State Resistance vs Gate-to-Source Voltage

Figure 9. Typical Diode Forward Voltage

Figure 11. Single Pulse Unclamped Inductive Switching

6 器件和文档支持

6.1 接收文档更新通知

要接收文档更新通知，请导航至 ti.com 上的器件米6体育平台手机版_好二三四文件夹。请单击右上角的通知我进行注册，即可收到任意米6体育平台手机版_好二三四信息更改每周摘要。有关更改的详细信息，请查看任意已修订文档中包含的修订历史记录。

6.2 社区资源

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.

TI E2E™ Online Community

TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers.

Design Support

TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support.

6.3 商标

NexFET, E2E are trademarks of Texas Instruments.

6.4 静电放电警告

这些装置包含有限的内置 ESD 保护。存储或装卸时，应将导线一起截短或将装置放置于导电泡棉中，以防止 MOS 门极遭受静电损伤。

6.5 Glossary

SLYZ022 — TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.