1 Features

• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• ESD Performance Tested Per JESD 22
  • 2000-V Human-Body Model
    (A114-B, Class II)
  • 1000-V Charged-Device Model (C101)
• Available in the Texas Instruments NanoStar™ Package
• Low Static-Power Consumption
  (I_CC = 0.9 µA Maximum)
• Low Dynamic-Power Consumption
  (C_pd = 1 pF Typical at 3.3 V)
• Low Input Capacitance (C_i = 1.5 pF Typical)
• Low Noise – Overshoot and Undershoot <10% of V_CC
• I_off Supports Partial Power-Down-Mode Operation
• Input Hysteresis Allows Slow Input Transition and Better Switching Noise Immunity at the Input (V_hys = 250 mV Typical at 3.3 V)
• Wide Operating V_CC Range of 0.8 V to 3.6 V
• Optimized for 3.3-V Operation
• 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
• t_pd = 3.6 ns Maximum at 3.3 V
• Suitable for Point-to-Point Applications