1 Features

• Available in the Texas Instruments
  NanoFree™ Package
• Supports 5-V V_CC Operation
• Inputs Accept Voltages to 5.5 V
• Supports Down Translation to V_CC
• Max t_pd of 4.3 ns at 3.3 V
• Low Power Consumption, 10-µA Max I_CC
• ±24-mA Output Drive at 3.3 V
• I_off Supports Live Insertion, Partial-Power-Down Mode, and Back-Drive Protection
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• ESD Protection Exceeds JESD 22
  • 2000-V Human-Body Model (A114-A)
  • 200-V Machine Model (A115-A)
  • 1000-V Charged-Device Model (C101)

2 Applications

• TV/Set Top Box/Audio
• EPOS (Electronic Point-of-Sale)
• Motor Drives
• PC/Notebook
• Servers
• Factory Automation and Control
• Tablets
• Medical Healthcare and Fitness
• Smart Grid
• Telecom Infrastructure
• Enterprise Switching
• Projectors
• Storage

3 Description

This single D-type flip-flop is designed for 1.65-V to 5.5-V V_CC operation.

The SN74LVC1G175 device has an asynchronous clear (CLR) input. When CLR is high, data from the input pin (D) is transferred to the output pin (Q) on the clock's (CLK) rising edge. When CLR is low, Q is forced into the low state, regardless of the clock edge or data on D.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

1. For all available packages, see the orderable addendum at the end of the data sheet.

Logic Diagram (Positive Logic)