This 7-bit LED dimmer for the two-line bidirectional bus (I2C) is designed to control (or dim) LEDs through the I2C interface. Without this device, the microcontroller must be actively involved in turning on and off the LEDs (per the required dimming rate), which uses valuable processor time. The TCA6507 alleviates this issue by limiting the number of operations required by the processor in blinking LEDs and helps to create a more efficient system. The TCA6507 handles all pulse width modulation (PWM) logic, allowing the processor to use its cycles for more important tasks.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
TCA6507 | TSSOP (14) | 5.00 mm × 4.40 mm |
BGA MICROSTAR JUNIOR (12) | 2.00 mm × 2.50 mm | |
X2QFN (12) | 2.00 mm × 1.40 mm |
Changes from C Revision (January 2016) to D Revision
Changes from B Revision (November 2007) to C Revision
PIN | I/O | DESCRIPTION | ||
---|---|---|---|---|
NAME | NO. | |||
PW | RUE | |||
EN | 4 | 4 | I | Enable input. If set to low, it puts the TCA6507 in shutdown mode and resets the internal registers and I2C/SMBus state machine to their default states |
GND | 5 | 5 | — | Ground |
P0 | 8 | 6 | O | P-port output 0. Open-drain design structure |
P1 | 9 | 7 | O | P-port output 1. Open-drain design structure |
P2 | 10 | 8 | O | P-port output 2. Open-drain design structure |
P3 | 11 | 9 | O | P-port output 3. Open-drain design structure |
P4 | 12 | 10 | O | P-port output 4. Open-drain design structure |
P5 | 13 | 11 | O | P-port output 5. Open-drain design structure |
P6 | 14 | 12 | O | P-port output 6. Open-drain design structure |
SDA | 3 | 3 | I/O | Serial data bus. Connect to VCC through a pull-up resistor |
SCL | 2 | 2 | I | Serial clock bus. Connect to VCC through a pull-up resistor |
VCC | 1 | 1 | — | Supply voltage of I2C registers, oscillator, and control logic. Connect directly to VCC of the external I2C master. Provides voltage-level translation |
C | B | A | |
---|---|---|---|
1 | P1 | P2 | GND |
2 | P3 | EN | SDA |
3 | P4 | P0 | SCL |
4 | P5 | P6 | VCC |
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NO. | NAME | ||
A1 | GND | — | Ground |
A2 | SDA | I/O | Serial data bus. Connect to VCC through a pullup resistor |
A3 | SCL | I | Serial clock bus. Connect to VCC through a pullup resistor |
A4 | VCC | — | Supply voltage of I2C registers, oscillator, and control logic. Connect directly to VCC of the external I2C master. Provides voltage-level translation |
B1 | P2 | O | P-port output 2. Open-drain design structure |
B2 | EN | I | Enable input. If set to low, it puts the TCA6507 in shutdown mode and resets the internal registers and I2C/SMBus state machine to their default states |
B3 | P0 | O | P-port output 0. Open-drain design structure |
B4 | P6 | O | P-port output 6. Open-drain design structure |
C1 | P1 | O | P-port output 1. Open-drain design structure |
C2 | P3 | O | P-port output 3. Open-drain design structure |
C3 | P4 | O | P-port output 4. Open-drain design structure |
C4 | P5 | O | P-port output 5. Open-drain design structure |
MIN | MAX | UNIT | ||||
---|---|---|---|---|---|---|
VCC | Supply voltage | –0.5 | 4.6 | V | ||
VI | Input voltage(2) | –0.5 | 6.5 | V | ||
VO | Output voltage(2) | 6.5 | V | |||
IIK | Input clamp current | VI < 0 | SCL, EN | ±20 | mA | |
IOK | Output clamp current | VO < 0 or VO > VCC | P port, SDA | ±20 | mA | |
IOL | Continuous output low current | VO = 0 to VCC | P port | 50 | mA | |
SDA | 25 | |||||
ICC | Continuous current through GND | 250 | mA | |||
Continuous current through VCC | 20 | |||||
Tstg | Storage temperature | –65 | 150 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±2000 | V |
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) | ±1000 |
MIN | MAX | UNIT | ||||
---|---|---|---|---|---|---|
VCC | Supply voltage of I2C registers, oscillator, and control logic | 1.65 | 3.6 | V | ||
VIH | High-level input voltage | SCL, SDA, EN | 1.65 V ≤ VCC ≤ 1.95 V | 1.3 | 3.6 | V |
1.96 V ≤ VCC ≤ 3.6 V | 0.7 × VCC | 3.6 | ||||
VIL | Low-level input voltage | SCL, SDA, EN | 1.65 V ≤ VCC ≤ 1.95 V | –0.5 | 0.3 | V |
1.96 V ≤ VCC ≤ 3.6 V | –0.5 | 0.3 × VCC | ||||
VO | Output voltage | 0 | 5.5 | V | ||
IOL | Low-level output current (1) | 40 | mA | |||
TA | Operating free-air temperature | –40 | 85 | °C |
THERMAL METRIC(1) | TCA6507 | UNIT | |||
---|---|---|---|---|---|
PW (TSSOP) | ZXU (BGA MICROSTAR JUNIOR) | RUE (X2QFN) | |||
14 PINS | 12 PINS | 12 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 127.2 | 155.2 | 181 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 55.8 | 99.4 | 80.4 | °C/W |
RθJB | Junction-to-board thermal resistance | 38.9 | 91.5 | 95.3 | °C/W |
ψJT | Junction-to-top characterization parameter | 9.3 | 6.8 | 3.5 | °C/W |
ψJB | Junction-to-board characterization parameter | 68.3 | 92.1 | 95.3 | °C/W |
PARAMETER | TEST CONDITIONS | VCC | MIN | TYP(1) | MAX | UNIT | |
---|---|---|---|---|---|---|---|
fINT | Intensity control clock frequency | Operating mode | 1.65 V to 3.6 V | 28 | 32 | 58 | kHz |
VIK | Input diode clamp voltage | II = –18 mA | 1.65 V to 3.6 V | –1.2 | V | ||
VPOR | Power-on reset voltage | VI = VCC or GND, IO = 0 | 1.65 V to 3.6 V | 1.1 | 1.4 | V | |
VOL | SDA | IOL = 6 mA | 1.65 V to 3.6 V | 0.2 | 0.6 | V | |
IOL | SDA | 1.65 V to 3.6 V | 3 | 13.2 | mA | ||
P port(2) | VOL = 0.5 V | 1.65 V | 25 | 59.7 | mA | ||
VOL = 0.6 V | 1.8 V to 3.6 V | 40 | 68 | ||||
II | SCL, SDA, EN | VI = VCC or GND, VCC ≥ 1.65 V | 1.65 V to 3.6 V | ±0.1 | μA | ||
ICC | Standby current | EN disabled, P port idle, Intensity control disabled, SCL = VCC, SDA = VCC, IO = 0, fSCL = 0 |
1.65 V to 1.95 V | 2 | 12 | μA | |
1.96 V to 3.6 V | 3 | 15 | |||||
Operating mode | P port running, Intensity control enabled, SCL = VCC, SDA = VCC, IO = 0, fSCL = 0 |
1.65 V to 1.95 V | 9.7 | 17 | μA | ||
1.96 V to 3.6 V | 10.4 | 20 | |||||
P port running, Intensity control enabled, SDA = VCC, IO = 0, fSCL = 400 kHz, tr = 300 ns |
1.65 V to 1.95 V | 10.2 | 18 | ||||
1.96 V to 3.6 V | 11.4 | 40 | |||||
Ci | SCL | 1.65 V to 3.6 V | 7 | 10 | pF | ||
Cio | SDA | VIO = VCC or GND | 1.65 V to 3.6 V | 8 | 11 | pF | |
Co | P port | VO = VCC or GND | 1.65 V to 3.6 V | 7 | 10 | pF |
MIN | MAX | UNIT | ||
---|---|---|---|---|
STANDARD and FAST MODE | ||||
tOSC | Oscillator start-up time from power-down or shutdown mode to fully on at 32 kHz | 5 | ms |
EN is Low (PWM Disabled) | fSCL = 0 |
EN is High (PWM Enabled) | fSCL = 400 kHz |
EN is Low (PWM Enabled) | fSCL = 0 |