TPL5100 是一个长期定时器集成电路 (IC),针对低功耗应用进行了优化。 TPL5100 能够替代一个微型控制器 (µC) 的内部定时器,使 µC 能够完全关闭,而不用运行一个定时器,从而减少 60% 至 80% 的总功耗。TPL5100 适用于循环供电应用,并且提供 16 秒至 1024 秒的可选定时间隔。 TPL5100 还可通过一个电源正常数字输入监视电池管理 IC,并在存在正常电源电压时仅为微控制器供电。 此器件采用 10 引脚超薄小外形尺寸 (VSSOP) 封装。
器件型号 | 封装 | 封装尺寸(标称值) |
---|---|---|
TPL5100 | VSSOP (10) | 3.00mm x 3.00mm |
Changes from B Revision (August 2013) to C Revision
PIN | I/O | DESCRIPTION | APPLICATION INFORMATION | |
---|---|---|---|---|
NAME | NO. | |||
D0 | 1 | I | Logic Input to set period delay (tDP) | Connect to GND (low logic value) or to VDD (high logic value) |
D1 | 2 | I | Logic Input to set period delay (tDP) | Connect to GND (low logic value) or to VDD (high logic value) |
D2 | 3 | I | Logic Input to set period delay (tDP) | Connect to GND (low logic value) or to VDD (high logic value) |
VDD | 4 | P | Supply voltage | |
GND | 5 | G | Ground | |
DONE | 6 | I | Logic input for Watchdog functionality | |
TCAL | 7 | O | Short duration pulse output for estimation of TPL5100 timer delay. | |
MOS_DRV | 8 | O | Drives external MOSFET to power cycle the remaining system. | |
DNC | 9 | – | Do Not Connect | Leave this pin floating |
PGOOD | 10 | I | Digital power good input |