TUSB320LI、TUSB320HI USB Type-C 配置通道逻辑和端口控制

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1 特性

USB Type-C™规范 1.1
向后兼容 USB Type-C 规范 1.0
支持高达 3A 的电流通告和检测
模式配置
- 仅主机 - 下行端口 (DFP)（供电设备）
- 仅设备 – 上行端口 (UFP)（受电设备）
- 双角色端口 – DRP
- 支持 Try.SRC 和 Try.SNK
通道配置 (CC)
- USB 端口连接检测
- 电缆方向检测
- 角色检测
- Type-C 电流模式（默认、中等和高）
V_BUS 检测
I²C 或 GPIO 控制
通过 I²C 实现角色配置控制
电源电压：2.7V 至 5V
低电流消耗
工业温度范围：–40°C 至 85°C

2 应用

主机、设备、双角色端口应用
移动电话
平板电脑和笔记本电脑
USB 外设

3 说明

TUSB320LI 和 TUSB320HI 器件（除非另外注明，否则本文档后续部分将统称为 TUSB320）可在 USB Type-C 端口上实现 Type-C 生态系统所需的配置通道 (CC) 逻辑。TUSB320 器件使用 CC 引脚来确定端口的连接状态和电缆方向，以及进行角色检测和 Type-C 电流模式控制。TUSB320 器件可配置为下行端口 (DFP)、上行端口 (UFP) 或双角色端口 (DRP)，因此成为任何应用的理想选择。

根据 Type-C 规范，TUSB320 会交替配置为 DFP 或 UFP。CC 逻辑块通过监视 CC1 和 CC2 引脚上的上拉或下拉电阻，以确定何时连接了 USB 端口、电缆的方向以及检测到的角色。CC 逻辑根据检测到的角色来确定 Type-C 电流模式为默认、中等还是高。该逻辑通过实施 V_BUS 检测来确定端口在 UFP 和 DRP 模式下是否连接成功。

该系列器件能够在宽电源范围内工作，并且具有较低功耗。TUSB320 提供两种使能版本：低电平有效使能，称为 TUSB320LI；高电平有效使能，称为 TUSB320HI。TUSB320 系列器件适用于工业级温度范围。

器件信息⁽¹⁾

器件型号	封装	封装尺寸（标称值）
TUSB320HI	X2QFN (12)	1.60mm x 1.60mm
TUSB320LI	X2QFN (12)	1.60mm x 1.60mm

要了解所有可用封装，请参见数据表末尾的可订购米6体育平台手机版_好二三四附录。

简化电路原理图

TUSB320HI TUSB320LI fp_bd_sllsen9_320.gif

示例应用

TUSB320HI TUSB320LI fp_image_sllsen9_320.png

4 修订历史记录

Changes from C Revision (October 2016) to D Revision

Changed R_VBUS values From: MIN = 891, TYP = 900, MAX = 909 KΩ To: MIN = 855, TYP = 887, MAX = 920 KΩ Go

Changes from B Revision (September 2016) to C Revision

Changed text for Pin 7 in the Pin Functions table From: "default current mode detected (H); medium or high current mode detected (L)." To: "Refer to Table 3 for more details."Go
Changed text for Pin 8 in the Pin Functions table From: "default or medium current mode detected (H); high current mode detected (L)." To: "Refer to Table 3 for more details."Go

Changes from A Revision (February 2016) to B Revision

Changed pins CC1 and CC2 values From: MIN = –0.3 MAX = V_DD + 0.3 To: MIN –0.3 MAX = 6 in the Absolute Maximum RatingsGo

Changes from * Revision (August 2015) to A Revision

Added Note 1 and 2 to the Pin Functions tableGo
Changed the DESCRIPTION of pin EN_N pin in the Pin Functions tableGo
Changed the DESCRIPTION of pin EN pin in the Pin Functions tableGo
Changed the DESCRIPTION of pin V_DD in the Pin Functions tableGo
Added Test Condition "See Figure 1" to VBUS_THR in the Electrical Characteristics Go
Added Note 2 to the Electrical Characteristics table Go
Replaced the Timing Requirements table Go
Added Note: "SW must make sure..." to the Description of INTERRUPT_STATUS in Table 9 Go
Added text to list item 2 in the TUSB320L Initialization Procedure sectionGo
Added text to list item 2 in the TUSB320H Initialization Procedure sectionGo

5 Pin Configuration and Functions

RWB Package

12-Pin X2QFN

TUSB320L Top View

RWB Package

12-Pin X2QFN

TUSB320H Top View

Pin Functions

PIN			TYPE	DESCRIPTION
NAME	NO.
NAME	TUSB320L	TUSB320H
CC1	1	1	I/O	Type-C configuration channel signal 1
CC2	2	2	I/O	Type-C configuration channel signal 2
PORT⁽¹⁾	3	3	I	Tri-level input pin to indicate port mode. The state of this pin is sampled when TUSB320L's EN_N is asserted low, TUSB320H's EN is asserted high, and VDD is active. This pin is also sampled following a I2C_SOFT_RESET. H - DFP (Pull-up to V_DD if DFP mode is desired) NC - DRP (Leave unconnected if DRP mode is desired) L - UFP (Pull-down or tie to GND if UFP mode is desired)
VBUS_DET⁽¹⁾	4	4	I	5- to 28-V V_BUS input voltage. V_BUS detection determines UFP attachment. One 900-kΩ external resistor required between system V_BUS and VBUS_DET pin.
ADDR⁽¹⁾	5	5	I	Tri-level input pin to indicate I²C address or GPIO mode: H - I²C is enabled and I²C 7-bit address is 0x67. NC - GPIO mode (I²C is disabled) L - I²C is enabled and I²C 7-bit address is 0x47. ADDR pin should be pulled up to V_DD if high configuration is desired
INT_N/OUT3⁽¹⁾	6	6	O	The INT_N/OUT3 is a dual-function pin. When used as the INT_N, the pin is an open drain output in I²C control mode and is an active low interrupt signal for indicating changes in I²C registers. When used as OUT3, the pin is in audio accessory detect in GPIO mode: no detection (H), audio accessory connection detected (L).
SDA/OUT1⁽¹⁾⁽²⁾	7	7	I/O	The SDA/OUT1 is a dual-function pin. When I²C is enabled (ADDR pin is high or low), this pin is the I²C communication data signal. When in GPIO mode (ADDR pin is NC), this pin is an open drain output for communicating Type-C current mode detect when the device is in UFP mode: Refer to Table 3 for more details.
SCL/OUT2⁽¹⁾⁽²⁾	8	8	I/O	The SCL/OUT2 is a dual function pin. When I²C is enabled (ADDR pin is high or low), this pin is the I²C communication clock signal. When in GPIO mode (ADDR pin is NC), this pin is an open drain output for communicating Type-C current mode detect when the device is in UFP mode: Refer to Table 3 for more details.
ID⁽¹⁾	9	9	O	Open drain output; asserted low when the CC pins detect device attachment when port is a source (DFP), or dual-role (DRP) acting as source (DFP).
GND	10	10	G	Ground
EN_N	11	—	I	Enable signal; active low. Pulled up to V_DD internally to disable the TUSB320L device. If controlled externally, must be held low at least for 50 ms after VDD has reached its valid voltage level.
EN	—	11	I	Enable signal; active high. Pulled down to GND internally to disable the TUSB320H device. If controlled externally, must be held low at least for 50 ms after VDD has reached its valid voltage level.
V_DD	12	12	P	Positive supply voltage. V_DD must ramp within 25 ms or less

(1) When V_DD is off, the TUSB320 non-failsafe pins (VBUS_DET, ADDR, PORT, ID, OUT[3:1] pins) could back-drive the TUSB320 device if not handled properly. When necessary to pull these pins up, it is recommended to pullup PORT, ADDR, INT_N/OUT3, and ID to the device V_DD supply. The VBUS_DET must be pulled up to VBUS through a 900-kΩ resistor.

(2) When using the 3.3 V supply for I²C, the end user must ensure that the V_DD is 3 V and above. Otherwise the I²C may back power the device.