1 Features

• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• ESD Protection Exceeds JESD 22
  • A Port
    • 2500 V Human-Body Model (A114-B)
    • 200 V Machine Model (A115-A)
    • 1500 V Charged-Device Model (C101)
  • B Port
    • 8 kV Human-Body Model (A114-B)
    • 200 V Machine Model (A115-A)
    • 1500 V Charged-Device Model (C101)
• No Direction-Control Signal Needed
• Maximum Data Rates
  • 24 Mbps (Push Pull)
  • 2 Mbps (Open Drain)
• Available in the Texas Instruments NanoFree™ Package
• 1.65 V to 3.6 V on A port and 2.3 V to 5.5 V on B port (V_CCA  ≤ V_CCB)
• V_CC Isolation Feature – If Either V_CC Input Is at GND, Both Ports Are in the High-Impedance State
• No Power-Supply Sequencing Required – Either V_CCA or V_CCB Can be Ramped First
• I_off Supports Partial-Power-Down Mode Operation

2 Applications

• Handsets
• Smartphones
• Tablets
• Desktop PCs

3 Description

This one-bit non-inverting translator uses two separate configurable power-supply rails. The A port is designed to track V_CCA. V_CCA accepts any supply voltage from 1.65 V to 3.6 V. The B port is designed to track V_CCB. V_CCA must be less than or equal to V_CCB. V_CCB accepts any supply voltage from 2.3 V to 5.5 V. This allows for low voltage bidirectional translation between any of the 1.8 V, 2.5 V, 3.3 V, and 5 V voltage nodes.

When the output-enable (OE) input is low, all outputs are placed in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pull-down resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

1. For all available packages, see the orderable addendum at the end of the data sheet.

Typical Operating Circuit