SNAS468D September   2008  – December 2014 ADC161S626

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Converter Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Reference Input (VREF)
      2. 7.3.2 Sample and Hold
        1. 7.3.2.1 Input Settling
      3. 7.3.3 Serial Digital Interface
        1. 7.3.3.1 CS Input
        2. 7.3.3.2 SCLK Input
        3. 7.3.3.3 Data Output
    4. 7.4 Device Functional Modes
      1. 7.4.1 Differential Input Operation
      2. 7.4.2 Single-Ended Input Operation
      3. 7.4.3 Short Cycling
      4. 7.4.4 Burst Mode Operation
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. Power Supply Recommendations
    1. 9.1 Analog and Digital Power Supplies
    2. 9.2 Voltage Reference
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Specification Definitions
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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1 Features

  • 16-bit Resolution With No Missing Codes
  • Ensured Performance from 50 to 250 kSPS
  • ±0.003% Signal Span Accuracy
  • Separate Digital Input/Output Supply
  • True Differential Input
  • External Voltage Reference Range of 0.5 V to VA
  • Zero-Power Track Mode with 0-µsec Wake-up Delay
  • Wide Input Common-mode Voltage Range of 0 V to VA
  • SPI/QSPI™/MICROWIRE™ Compatible Serial Interface
  • Operating Temperature Range of −40°C to +85°C
  • Small VSSOP-10 Package
  • Key Specifications
    • Conversion Rate 50 to 250 kSPS
    • DNL +0.8 / −0.5 LSB
    • INL ±0.8 LSB
    • Offset Error Temp Drift 2.5 μV/°C
    • Gain Error Temp Drift 0.3 ppm/°C
    • SNR 93.2 dBc
    • THD − 104 dBc
    • Power Consumption
      • 10 kSPS, 5 V 0.24 mW
      • 200 kSPS, 5 V 5.3 mW
      • 250 kSPS, 5 V 5.8 mW
      • Power-Down, 5 V 10 μW

2 Applications

  • Direct Sensor Interface
  • I/O Modules
  • Data Acquisition
  • Portable Systems
  • Motor Control
  • Medical Instruments
  • Instrumentation and Control Systems

3 Description

The ADC161S626 is a 16-bit successive-approximation register (SAR) Analog-to-Digital converter (ADC) with a maximum sampling rate of 250 kSPS. The ADC161S626 has a minimum signal span accuracy of ±0.003% over the temperate range of −40°C to +85°C. The converter features a differential analog input with an excellent common-mode signal rejection ratio of 85 dB, making the ADC161S626 suitable for noisy environments.

The ADC161S626 operates with a single analog supply (VA) and a separate digital input/output (VIO) supply. VA can range from 4.5 V to 5.5 V and VIO can range from 2.7 V to 5.5 V. This allows a system designer to maximize performance and minimize power consumption by operating the analog portion of the ADC at a VA of 5 V while interfacing with a 3.3-V controller. The serial data output is binary 2's complement and is SPI compatible.

The performance of the ADC161S626 is ensured over temperature at clock rates of 1 MHz to 5 MHz and reference voltages of 2.5 V to 5.5 V. The ADC161S626 is available in a small 10-lead VSSOP package. The high accuracy, differential input, low power consumption, and small size make the ADC161S626 ideal for direct connection to bridge sensors and transducers in battery operated systems or remote data acquisition applications.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
ADC161S626 VSSOP (10) 3.00 mm × 3.00 mm
  1. For all available packages, see the orderable addendum at the end of the datasheet.

Typical Application Schematic

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