ZHCSMB7A
October 2020 – May 2022
ADC3641
,
ADC3642
,
ADC3643
PRODUCTION DATA
1
特性
2
应用
3
说明
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics - Power Consumption
6.6
Electrical Characteristics - DC Specifications
6.7
Electrical Characteristics - AC Specifications ADC3641
6.8
Electrical Characteristics - AC Specifications ADC3642
6.9
Electrical Characteristics - AC Specifications ADC3643
6.10
Timing Requirements
6.11
Typical Characteristics - ADC3641
6.12
Typical Characteristics - ADC3642
6.13
Typical Characteristics - ADC3643
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Analog Input
8.3.1.1
Analog Input Bandwidth
8.3.1.2
Analog Front End Design
8.3.1.2.1
Sampling Glitch Filter Design
8.3.1.2.2
Single Ended Input
8.3.1.2.3
Analog Input Termination and DC Bias
8.3.1.2.3.1
AC-Coupling
8.3.1.2.3.2
DC-Coupling
8.3.1.3
Auto-Zero Feature
8.3.2
Clock Input
8.3.2.1
Single Ended vs Differential Clock Input
8.3.2.2
Signal Acquisition Time Adjust
8.3.3
Voltage Reference
8.3.3.1
Internal voltage reference
8.3.3.2
External voltage reference (VREF)
8.3.3.3
External voltage reference with internal buffer (REFBUF)
8.3.4
Digital Down Converter
8.3.4.1
DDC MUX
8.3.4.2
Digital Filter Operation
8.3.4.2.1
FS/4 Mixing with Real Output
8.3.4.3
Numerically Controlled Oscillator (NCO) and Digital Mixer
8.3.4.4
Decimation Filter
8.3.4.5
SYNC
8.3.4.6
Output Formatting with Decimation
8.3.4.6.1
Parallel CMOS
8.3.4.6.2
Serialized CMOS
8.3.5
Digital Interface
8.3.5.1
Parallel CMOS Output
8.3.5.2
Serialized CMOS output
8.3.5.2.1
SDR Output Clocking
8.3.5.3
Output Data Format
8.3.5.4
Output Formatter
8.3.5.5
Output Bit Mapper
8.3.5.6
Output Interface/Mode Configuration
8.3.5.6.1
Configuration Example
8.3.6
Test Pattern
8.4
Device Functional Modes
8.4.1
Normal operation
8.4.2
Power Down Options
8.5
Programming
8.5.1
Configuration using PINs only
8.5.2
Configuration using the SPI interface
8.5.2.1
Register Write
8.5.2.2
Register Read
8.6
Register Maps
8.6.1
Detailed Register Description
9
Application and Implementation
9.1
Typical Application
9.1.1
Design Requirements
9.1.2
Detailed Design Procedure
9.1.2.1
Input Signal Path
9.1.2.2
Sampling Clock
9.1.2.3
Voltage Reference
9.1.3
Application Curves
9.2
Initialization Set Up
9.2.1
Register Initialization During Operation
9.3
Power Supply Recommendations
9.4
Layout
9.4.1
Layout Guidelines
9.4.2
Layout Example
10
Device and Documentation Support
10.1
接收文档更新通知
10.2
支持资源
10.3
Trademarks
10.4
Electrostatic Discharge Caution
10.5
术语表
11
Mechanical, Packaging, and Orderable Information
封装选项
机械数据 (封装 | 引脚)
RSB|40
MPQF185C
散热焊盘机械数据 (封装 | 引脚)
RSB|40
QFND255H
订购信息
zhcsmb7a_oa
zhcsmb7a_pm
1
特性
双通道
14 位 10/25/65 MSPS ADC
本底噪声:–155 dBFS/Hz
超低功耗,具备优化的功耗调节:
每通道 29mW (10MSPS) 至每通道 72mW (65MSPS)
延迟:1 个时钟周期
14 位,无丢码
INL:±0.6LSB;DNL:±0.2LSB
基准:外部或内部
工业温度范围:-40°C 至 +105°C
片上数字滤波器(可选)
2 倍、4 倍、8 倍、16 倍、32 倍抽取率
32 位 NCO
DDR 和串行 CMOS 接口
小尺寸: 40 引脚 VQFN (5mm × 5mm) 封装
1.8V 单电源
频谱性能 (f
IN
= 5MHz):
SNR:79.0 dBFS
SFDR:93dBc HD2,HD3
SFDR:101dBFS 最严重毛刺
频谱性能 (f
IN
= 64MHz):
SNR:74.0dBFS
SFDR:84dBc HD2、HD3
SFDR:90dBFS 最严重毛刺
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