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AFE11612-SEP 具有多通道 ADC、DAC 和温度传感器的耐辐射模拟监视器和控制器
ZHCST39A
December 2022 – September 2023
AFE11612-SEP
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AFE11612-SEP 具有多通道 ADC、DAC 和温度传感器的耐辐射模拟监视器和控制器
1
1
特性
2
应用
3
说明
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Characteristics
6.7
Timing Diagrams
6.8
Typical Characteristics: DAC
6.9
Typical Characteristics: ADC
6.10
Typical Characteristics: Internal Reference
6.11
Typical Characteristics: Temperature Sensor
6.12
Typical Characteristics: Digital Inputs
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Primary ADC Operation
7.3.1.1
Analog Inputs
7.3.1.1.1
Single-Ended Analog Input
7.3.1.1.2
Fully Differential Input
7.3.1.2
ADC Trigger Signals (See AFE configuration register 0 )
7.3.1.3
Double-Buffered ADC Data Registers
7.3.1.3.1
ADC Data Format
7.3.1.4
SCLK Clock Noise Reduction
7.3.1.5
Data Available Pin (DAV)
7.3.1.6
Convert Pin (CNVT)
7.3.1.7
Analog Input Out-of-Range Detection (See The Analog Input Out-of-Range Alarm Section)
7.3.1.8
Full-Scale Range of the Analog Input
7.3.2
Secondary ADC and Temperature Sensor Operation
7.3.2.1
Remote Sensing Diode
7.3.2.2
Ideality Factor
7.3.2.3
Filtering
7.3.2.4
Series Resistance Cancellation
7.3.2.5
Reading Temperature Data
7.3.2.6
Conversion Time
7.3.3
Reference Operation
7.3.3.1
Internal Reference
7.3.3.2
External Reference
7.3.4
DAC Operation
7.3.4.1
Resistor String
7.3.4.2
DAC Output
7.3.4.2.1
Full-Scale Output Range
7.3.4.2.2
DAC Output After Power-On Reset
7.3.4.3
Double-Buffered DAC Data Registers
7.3.4.4
Load DAC Latch
7.3.4.5
Synchronous Output Updating
7.3.4.6
Clear DACs
7.3.4.7
DAC Output Thermal Protection
7.3.5
Alarm Operation
7.3.5.1
Analog Input Out-of-Range Alarm
7.3.5.2
ALARM Pin
7.3.5.3
Hysteresis
7.3.5.4
False-Alarm Protection
7.3.6
General-Purpose Input and Output Pins (GPIO-0 To GPIO-7)
7.3.7
Device Reset Options
7.3.7.1
Hardware Reset
7.3.7.2
Software Reset
7.3.7.3
Power-On Reset (POR)
7.4
Device Functional Modes
7.4.1
DAC Output Mode
7.4.2
ADC Conversion Modes
7.4.2.1
Programmable Conversion Rate
7.4.2.2
Handshaking with the Host (See AFE configuration register 0 )
7.5
Programming
7.5.1
I2C-Compatible Interface
7.5.1.1
F/S-Mode Protocol
7.5.1.2
Hs-Mode Protocol
7.5.1.3
Address Pointer
7.5.1.4
Timeout Function
7.5.1.5
Device Communication Protocol For I2C
7.5.1.5.1
Writing A Single Register ( )
7.5.1.5.2
Writing Multiple Registers ( )
7.5.1.5.3
Reading a Single Register ( )
7.5.1.5.4
Reading Multiple Registers ( and )
7.5.2
Serial Peripheral Interface (SPI)
7.5.2.1
SPI Shift Register
7.5.2.2
SPI Communications Command
7.5.2.3
Standalone Operation
7.5.2.4
Daisy-Chain Operation
7.6
Register Maps
7.6.1
Temperature Data Registers (Read-Only)
7.6.1.1
LT-Temperature-Data (LT_TEMP) Register (address = 00h) [reset = 0000h, 0°C]
7.6.1.2
D1-Temperature-Data (D1_TEMP) Register (address = 01h) [reset = 0000h, 0°C]
7.6.1.3
D2-Temperature-Data (D2_TEMP) Register (address = 02h) [reset = 0000h, 0°C]
7.6.2
Temperature Configuration (TEMP_CONFIG) Register (address = 0Ah) [reset = 003Ch or 3CFFh]
7.6.3
Temperature Conversion Rate (TEMP_CONV_RATE) Register (address = 0Bh) [reset = 0007h or 07FFh]
7.6.4
η-Factor Correction Registers: D1_N_ADJUST and D2_N_ADJUST (address = 21h and 22h) [reset = 0000h or 00FFh]
7.6.5
ADC-n-Data (ADC_n) Registers (addresses = 23h to 32h) [reset = 0000h]
7.6.6
DAC-n-Data (DAC_n) Registers (addresses = 33h to 3Eh) [reset = 0000h)
7.6.7
DAC-n-CLR-Setting (DAC_n_CLR) Registers (addresses = 3Fh to 4Ah) [reset = 0000h]
7.6.8
GPIO Register (address = 4Bh) [reset = 00FFh]
7.6.9
AFE Configuration Register 0 (AFE_CONFIG_0) (address = 4Ch) [reset = 2000h]
7.6.10
AFE Configuration Register 1 (AFE_CONFIG_1) (Address = 4Dh) [reset = 0070h]
7.6.11
Alarm Control Register (ALR_CTRL) (address = 4Eh) [reset = 0000h]
7.6.12
STATUS Register (Address = 4Fh) [reset = 0000h]
7.6.13
ADC Channel Register 0 (ADC_CH0) (address = 50h) [reset = 0000h]
7.6.14
ADC Channel Register 1 (ADC_CH1) (address = 51h) [reset = 0000h]
7.6.15
ADC Gain Register (ADC_GAIN) (address = 52h) [reset = FFFFh]
7.6.16
AUTO_DAC_CLR_SOURCE Register (address = 53h) [reset = 0004h]
7.6.17
AUTO_DAC_CLR_EN Register (address = 54h) [reset = 0000h]
7.6.18
SW_DAC_CLR Register (address = 55h) [reset = 0000h]
7.6.19
HW_DAC_CLR_EN_0 Register (address = 56h) [reset = 0000h]
7.6.20
HW_DAC_CLR_EN_1 Register (address = 57h) [reset = 0000h]
7.6.21
DAC Configuration (DAC_CONFIG) Register (address = 58h) [reset = 0000h]
7.6.22
DAC Gain (DAC_GAIN) Register (address = 59h) [reset = 0000h]
7.6.23
Analog Input Channel Threshold Registers (addresses = 5Ah To 61h)
7.6.23.1
Input-n-High-Threshold Register (where n = 0, 1, 2, 3; addresses: 0 = 5Ah, 1 = 5Ch, 2 = 5Eh, 3 = 60h) [reset = 0FFFh]
7.6.23.2
Input-n-Low-Threshold Register (where n = 0, 1, 2, 3; addresses: 0 = 5Bh, 1 = 5Dh, 2 = 5Fh, 3 = 61h) (reset = 0000h)
7.6.24
Temperature Threshold Registers
7.6.24.1
LT_HIGH_THRESHOLD Register (address = 62h) [reset = 07FFh, +255.875°C]
7.6.24.2
LT_LOW_THRESHOLD Register (address = 63h) [reset = 0800h, –256°C]
7.6.24.3
D1_HIGH_THRESHOLD Register (address = 64h) [reset = 07FFh, +255.875°C]
7.6.24.4
D1_LOW_THRESHOLD Register (address = 65h) [reset = 0800h, –256°C]
7.6.24.5
D2_HIGH_THRESHOLD Register (address = 66h) [reset = 07FFh, +255.875°C]
7.6.24.6
D2_LOW_THRESHOLD Register (address = 67h) [reset = 0800h, –256°C]
7.6.25
Hysteresis Registers
7.6.25.1
Hysteresis Register 0 (HYST_0) (address = 68h) [reset = 0810h, 8 LSB]
7.6.25.2
Hysteresis Register 1 (HYST_1) (address = 69h) [reset = 0810h, 8 LSB]
7.6.25.3
Hysteresis Register 2 (HYST_2) (address = 6Ah) [reset = 2108h, 8°C]
7.6.26
Power-Down Register (PWR_DOWN) (address = 6Bh) [reset = 0000h)
7.6.27
Device ID Register (DEVICE_ID) (read only address = 6Ch) [reset = 1220h]
7.6.28
Software Reset (SW_RST) Register (read or write address = 7Ch) [reset = N/A)
7.6.28.1
SPI Mode
7.6.28.2
I2C Mode
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Sequencing
8.2.2.2
Negative GaN Biasing
8.2.2.3
VDRAIN Monitoring
8.2.3
Application Curves
8.3
Power Supply Recommendations
8.3.1
Power-Supply Sequence
8.4
Layout
8.4.1
Layout Guidelines
8.4.2
Layout Diagram
9
Device and Documentation Support
9.1
Documentation Support
9.2
接收文档更新通知
9.3
支持资源
9.4
Trademarks
9.5
静电放电警告
9.6
术语表
10
Mechanical, Packaging, and Orderable Information
重要声明
封装选项
机械数据 (封装 | 引脚)
PAP|64
MPQF071C
散热焊盘机械数据 (封装 | 引脚)
PAP|64
PPTD050N
订购信息
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Data Sheet
AFE11612-SEP 具有多通道 ADC、DAC 和温度传感器的
耐辐射模拟监视器和控制器
本资源的原文使用英文撰写。 为方便起见，TI 提供了译文；由于翻译过程中可能使用了自动化工具，TI 不保证译文的准确性。 为确认准确性，请务必访问 ti.com 参考最新的英文版本（控制文档）。
1
特性
抗辐射：
在 125°C 的环境温度下，单粒子锁定 (SEL) 抗扰度高达
LET = 43 MeV-cm
2
/mg
单粒子功能中断 (SEFI) 的 LET 特征值高达 43 MeV-cm
2
/mg
电离辐射总剂量 (TID) RLAT/RHA 特征值高达 20 krad(Si)
增强型航天塑料（航天 EP）：
符合 ASTM E595 释气规格要求
供应商项目图 (VID) V62/22614
军用级温度范围：–55°C 至 +125°C
制造、组装和测试一体化基地
金键合线，NiPdAu 铅涂层
晶圆批次可追溯性
延长了米6体育平台手机版_好二三四生命周期
12 个单调性 12 位 DAC
0V 至 5V 输出范围
DAC 关断至用户定义电平
16 输入 12 位 SAR ADC
高采样率：500kSPS
16 个单端输入或
2 个差分输入和 12 个单端输入
可编程超限报警
8 个 GPIO 引脚
内部 2.5V 基准电压
两个远程温度传感器
内部温度传感器
可配置的 SPI 和 I
2
C 接口
2.7V 至 5.5V 的工作电压
2
应用
命令和数据处理 (C&DH)
通信负载
雷达成像有效载荷
光学成像有效载荷
一般模拟监视和控制
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