SNLS396D January   2012  – January 2016 DS100MB203

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Electrical Characteristics - Serial Management Bus Interface
    7. 6.7 Timing Requirements - Serial Bus Interface
    8. 6.8 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 4-Level Input Configuration Guidelines
    4. 7.4 Device Functional Modes
      1. 7.4.1 Pin Control Mode
      2. 7.4.2 SMBUS Mode
    5. 7.5 Programming
      1. 7.5.1 SMBUS Master Mode
    6. 7.6 Register Maps
      1. 7.6.1 System Management Bus (SMBus) and Configuration Registers
        1. 7.6.1.1 Transfer of Data Through the SMBus
        2. 7.6.1.2 SMBus Transactions
        3. 7.6.1.3 Writing a Register
        4. 7.6.1.4 Reading a Register
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 General Recommendations
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
    1. 9.1 Power Supply Bypassing
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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订购信息

1 Features

  • 10.3125 Gbps Dual Lane 2:1 Mux, 1:2 Switch or Fan-Out
  • Low 390 mW Total Power (Typical)
  • Advanced Signal Conditioning Features:
    • Receive Equalization Up to 36 dB at 5 GHz
    • Transmit De-Emphasis Up to –12 dB
    • Transmit Output Voltage Control: 600 mV to 1300 mV
  • Programmable Through Pin Selection, EEPROM or SMBus Interface
  • Selectable 2.5-V or 3.3-V Supply Voltage
  • –40°C to 85°C Operating Temperature Range

2 Applications

  • 10GE, 10G-KR
  • PCIe Gen-1/2/3
  • SAS2/SATA3 (Up to 6 Gbps)
  • XAUI, RXAUI

3 Description

The DS100MB203 device is a dual port 2:1 multiplexer and 1:2 switch or fan-out buffer with signal conditioning suitable for 10GE, 10G-KR (802.3ap), Fibre Channel, PCIe, Infiniband, SATA3/SAS2 and other high-speed bus applications with data rates up to 10.3125 Gbps.

The continuous time linear equalizer (CTLE) of the receiver provides necessary boost to compensate up to 40” FR-4 or 10m cable (AWG-24) at 10.3125 Gbps - This on-chip feature eliminates the need for external signal conditioners. The transmitter features a programmable amplitude voltage levels to be selectable from 600 mVp-p to 1300 mVp-p and De-Emphasis of up to 12 dB.

The DS100MB203 can be configured to support PCIe, SAS/SATA, 10G-KR or other signaling protocols. When operating in 10G-KR and PCIe Gen-3 mode, the DS100MB203 transparently allows the host controller and the end point to optimize the full link and negotiate transmit equalizer coefficients. This seamless management of the link training protocol ensures system level interoperability with minimum latency.

The programmable settings can be applied through pin settings, SMBus (I2C) protocol or loaded directly from an external EEPROM. When operating in the EEPROM mode, the configuration information is automatically loaded on power up, which eliminates the need for an external microprocessor or software driver.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
DS100MB203 WQFN (54) 10.00 mm × 5.50 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.


Simplified Functional Block Diagram

DS100MB203 MB203_simplified_schematic.gif

Typical Application

DS100MB203 MBapplication_fp.gif