ZHCSJ96B September   2005  – January 2019 DS90LT012AH

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
    1.     Device Images
      1.      连接图
      2.      功能图
  4. 修订历史记录
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Termination
      2. 8.3.2 Threshold
      3. 8.3.3 Fail-Safe Feature
      4. 8.3.4 Probing LVDS Transmission Lines
      5. 8.3.5 Cables and Connectors, General Comments
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Point-to-Point Communications
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Receiver Bypass Capacitance
          2. 9.2.1.2.2 Interconnecting Media
          3. 9.2.1.2.3 PCB Transmission Lines
        3. 9.2.1.3 Application Curve
  10. 10Power Supply Recommendations
    1. 10.1 Power Supply Considerations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Microstrip vs. Stripline Topologies
      2. 11.1.2 Dielectric Type and Board Construction
      3. 11.1.3 Recommended Stack Layout
      4. 11.1.4 Separation Between Traces
      5. 11.1.5 Crosstalk and Ground Bounce Minimization
      6. 11.1.6 Decoupling
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 接收文档更新通知
    2. 12.2 社区资源
    3. 12.3 商标
    4. 12.4 静电放电警告
    5. 12.5 术语表
  13. 13机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

特性

  • -40°C 至 +125°C 温度范围工作
  • 符合 ANSI TIA/EIA-644-A 标准
  • >400Mbps (200MHz) 开关速率
  • 100ps 差动偏斜(典型值)
  • 3.5ns 最大传播延迟
  • 集成线路端接电阻(100Ω 典型值)
  • 单通道 3.3V 电源设计(2.7V 至 3.6V 范围)
  • 在断电模式下,LVDS 输入端具有高阻抗
  • LVDS 输入可接受 LVDS/CML/LVPECL 信号
  • 引脚简化了 PCB 布局
  • 低功率耗散(3.3V 静态条件下为典型值 10mW)
  • 5 引脚小外形尺寸晶体管 (SOT)-23 封装