TPSM63606(S) 36-V, 6-A Buck Regulator Evaluation Module User's Guide

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1 High-Density EVM Description

The TPSM63606EVM features the TPSM63606 synchronous buck power module configured for operation with typical 3-V to 36-V input bus applications (the TPSM63606SEVM features the TPSM63606S, where S denotes pseudo-random spread spectrum frequency modulation). This wide-V_IN range DC/DC solution offers outsized voltage rating and operating margin to withstand supply-rail voltage transients.

The output voltage and switching frequency can each be set to one of five popular values by using configuration jumpers. The EVM provides the full 6-A output current rating of the device. The selected input and output capacitors accommodate the entire range of input voltage and the selectable output voltages on the EVM and are available from multiple component vendors. Input and output voltage sense terminals and a test point header facilitate measurement of the following:

Efficiency and power dissipation
Line and load regulation
Load transient response
Enable ON/OFF
Bode plot (crossover frequency and phase margin)

The header also provides connections for enable (EN), external clock synchronization (SYNC), and power-good (PGOOD) features of the device. The recommended PCB layout maximizes thermal performance and minimizes output ripple and noise. The schematic and layout are the same for the TPSM63606EVM and TPSM63606SEVM. The only difference is the module IC.

1.1 Typical Applications

Test and measurement, aerospace and defense
Factory automation and control, general-purpose power supplies
Inverting buck-boost (IBB) circuits requiring negative output voltage

1.2 Features and Electrical Performance

Complete 6-A buck power stage with integrated power MOSFETs, buck inductor, and PWM controller
Wide input voltage operating range of 3 V to 36 V (absolute maximum rating of 42 V)
Default output voltage and switching frequency of 5 V and 1 MHz, respectively. Use jumper options for alternative configurations:
- 1.8 V, 500 kHz
- 2.5 V, 500 kHz
- 3.3 V, 750 kHz
- 12 V, 2 MHz
High efficiency across a wide load-current range
- Full-load efficiency of 92% and 91.4% at V_IN = 12 V and 24 V, respectively
- 95% and 93.5% efficiencies at half-rated load, V_IN = 12 V and 24 V, respectively
- External bias option reduces no-load supply current and enhances thermal performance
Improved EMI performance for noise-sensitive applications
- Meets CISPR 11 and CISPR 32 Class B EMI standards for both conducted and radiated emissions
- Input π-stage EMI filter with electrolytic capacitor for parallel damping
- Parallel input and output paths with symmetrical capacitor layouts minimize radiated field coupling
- Clock synchronization and FPWM mode provide constant switching frequency across the full load range
- Integrated input, VCC, and bootstrap capacitors enable low-noise switching performance
- The TPSM63606SEVM includes pseudo-random spread spectrum (PRSS) for lower peak emissions
Peak current-mode control architecture enables fast line and load transient response
- Integrated loop compensation and frequency-proportional slope compensation
Inherent protection features for robust and reliable design
- Overcurrent protection (OCP) with peak and valley current limits
- Thermal shurdown protection with hysteresis
- PGOOD indicator with 49.9-kΩ pullup resistor to VOUT
- Resistor-programmable input voltage UVLO set to turn on and off at V_IN of 5.1 V and 3.65 V, respectively
Fully assembled, tested and proven 4-layer PCB design with 76-mm × 63-mm total footprint

2 EVM Performance Specifications

Unless otherwise indicated, V_IN = 24 V, V_OUT = 5 V, I_OUT = 6 A and F_SW = 1 MHz

Table 2-1 Electrical Performance Specifications

PARAMETER	TEST CONDITIONS		MIN	TYP	MAX	UNIT
INPUT CHARACTERISTICS
Input voltage range, V_IN	Operating		4		36	V
Input voltage turn-on, V_IN(on)	Adjusted using EN divider resistors			5.1
Input voltage turn-off, V_IN(off)				3.65
Input voltage hysteresis, V_IN(hys)				1.45
Input current, disabled, I_IN(off)	V_EN = 0 V (with 402-kΩ and 133-kΩ UVLO divider)			45		µA
OUTPUT CHARACTERISTICS
Output voltage, V_OUT⁽¹⁾	Adjustable from 1 V to 16 V		4.9	5.0	5.1	V
Output current, I_OUT	V_IN = 4 V to 36 V ⁽²⁾		0		6	A
Output voltage regulation, ΔV_OUT	Load regulation	I_OUT = 0 A to 6 A		0.1%
Output voltage regulation, ΔV_OUT	Line regulation	V_IN = 6 V to 36 V		0.1%
Output voltage ripple, V_OUT(AC)				25		mVrms
Output overcurrent protection, I_OCP				8		A
SYSTEM CHARACTERISTICS
Default switching frequency, F_SW(nom)	Adjustable from 200 kHz to 2.2 MHz (based on V_OUT)			1		MHz
Half-load efficiency, η_HALF⁽¹⁾	V_IN = 24 V, I_OUT = 3 A	V_OUT = 2.5 V, F_SW = 500 kHz		89.4%
		V_OUT = 3.3 V, F_SW = 750 kHz		92.7%
		V_OUT = 5 V, F_SW = 1 MHz		93.5%
		V_OUT = 12 V, F_SW = 2 MHz		95.7%
	V_IN = 24 V, I_OUT = –1.5 A ⁽³⁾	V_OUT = –12 V, F_SW = 2 MHz		90.3%
Full-load efficiency, η_FULL⁽¹⁾	V_IN = 24 V, I_OUT = 6 A	V_OUT = 2.5 V, F_SW = 500 kHz		85.7%
		V_OUT = 3.3 V, F_SW = 750 kHz		88.5%
		V_OUT = 5 V, F_SW = 1 MHz		91.4%
		V_OUT = 12 V, F_SW = 2 MHz		94.8%
	V_IN = 24 V, I_OUT = –3 A ⁽³⁾	V_OUT = –12 V, F_SW = 2 MHz		91.5%
Ambient temperature, T_A			–40		105	°C
Junction temperature, T_J			–40		125	°C

(1) The default output voltage and switching frequency of this EVM are 5 V and 1 MHz, respectively. The VLDOIN pin conencts to the output for output voltages of 3.3 V and above. Efficiency and other performance metrics can change based on operating input voltage, load current, switching frequency, external bias voltage, ambient temerature, externally connected output capacitance, and other parameters.

(2) The recommended airflow is 200 LFM when operating at output currents greater than 4 A and switching freqeuncies above 1 MHz.

(3) Configure the EVM as an IBB topology with negative output voltage by connecting the input source between the VIN+ and VOUT+ power terminals. The achievable output current is I_OUT = I_Lmax(DC) × (1 – D), where I_Lmax(DC) = 6 A is the rated DC current of the module's integrated inductor and D = |V_OUT| / (V_IN + |V_OUT|) is the duty cycle.

3 EVM Photo

Figure 3-1 highlights the buck module power stage and the various connection interfaces associated with the EVM. Use terminal blocks J1 and J2 to connect the input supply and load, respectively. These terminal blocks accept up to 16-AWG wire thickness.

Figure 3-1 TPSM63606(S) EVM Photo

4 Test Setup and Procedure

4.1 EVM Connections

Referencing the EVM connections described in Table 4-1, use the recommended test setup in Figure 4-1 to evaluate the TPSM63606(S). Working at an ESD-protected workstation, make sure that any wrist straps, bootstraps, or mats are connected and referencing the user to earth ground before power is applied to the EVM.

Figure 4-1 EVM Test Setup

Table 4-1 EVM Power Connections

LABEL	DESCRIPTION
VIN+	Positive input power connection
VIN–	Negative input power connection
VOUT+	Positive output power connection
VOUT–	Negative output power connection

Table 4-2 EVM Signal Connections

LABEL⁽¹⁾	DESCRIPTION
VIN S+	Positive input sense terminal. Connect the multimeter positive lead for measuring efficiency.
VIN S–	Negative input sense terminal. Connect a multimeter negative lead for measuring efficiency.
VOUT S+	Positive output sense terminal. Connect a multimeter positive lead for measuring efficiency and line and load regulation.
VOUT S–	Negative output sense terminal. Connect the multimeter negative lead for measuring efficiency and line and load regulation.
PGND	Ground reference point
EN	Precision enable input and input voltage UVLO protection. Tie EN to GND to disable the regulator. Use a logic signal to control EN for remote ON/OFF functionality. Leave EN open for UVLO turn-on thresholds set at 5.1 V.
SYNC	Synchronization input. Connect a valid clock signal to synchronize the switching frequency from 200 kHz to 2.2 MHz.
PGOOD	Power-good monitor output. This is an open-drain flag with a 49.9-kΩ pullup resistor to VOUT.
BODE, VOUT	Bode plot measurement and signal injection. A 10-Ω resistor from BODE to VOUT facilitates oscillator signal injection for bode plot measurement. Remove the jumper and apply a swept-frequency signal bettwen BODE and VOUT while measuring the respective response at each terminal for loop gain measurement.

(1) Refer to the TPSM63606 data sheet for absolute maximum ratings associated with the features in this table.