TPS54233 2A, 28V Input, Step Down DC/DC Converter With Eco-mode™

1 Features

3.5 V to 28 V Input Voltage Range
Adjustable Output Voltage Down to 0.8 V
Integrated 80 mΩ High Side MOSFET Supports up to 2A Continuous Output Current
High Efficiency at Light Loads with a Pulse Skipping Eco-mode™
Fixed 300 kHz Switching Frequency
Typical 1 μA Shutdown Quiescent Current
Adjustable Slow Start Limits Inrush Currents
Programmable UVLO Threshold
Overvoltage Transient Protection
Cycle by Cycle Current Limit, Frequency Fold Back and Thermal Shutdown Protection
Available in Easy-to-Use SOIC8 Package
Supported by WEBENCH® Software Tool (www.TI.com/WEBENCH)

2 Applications

Consumer Applications such as Set-Top Boxes, CPE Equipment, LCD Displays, Peripherals, and Battery Chargers
Industrial and Car Audio Power Supplies
5V, 12V and 24V Distributed Power Systems

3 Description

The TPS54233 is a 28 V, 2 A non-synchronous buck converter that integrates a low R_DS(on) high side MOSFET. To increase efficiency at light loads, a pulse skipping Eco-mode™ feature is automatically activated. Furthermore, the 1 μA shutdown supply current allows the device to be used in battery powered applications. Current mode control with internal slope compensation simplifies the external compensation calculations and reduces component count while allowing the use of ceramic output capacitors. A resistor divider programs the Hysteresis of the input under-voltage lockout. An overvoltage transient protection circuit limits voltage overshoots during startup and transient conditions. A cycle by cycle current limit scheme, frequency fold back and thermal shutdown protect the device and the load in the event of an overload condition. The TPS54233 is available in an 8-pin SOIC package that has been internally optimized to improve thermal performance.

Device Information⁽¹⁾

PART NUMBER	PACKAGE	BODY SIZE (NOM)
TPS54233	SOIC (8)	4.90 mm x 3.90 mm

For all available packages, see the orderable addendum at the end of the data sheet.

4 Simplified Schematic

Efficiency

5 Revision History

Changes from B Revision (February 2011) to C Revision

Added ESD Rating table, Thermal Information table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Device and Documentation Support section, and Mechanical, Packaging sections. Go
Deleted Features Item: For SWIFT™ Documentation, See the TI Website at www.ti.com/swiftGo
Changed Features item: Supported by SwitcherPro™ To: Supported by WEBENCH®Go
Changed R_O1 To: R5, R_O2 To R6, C₁ To C6, and C₂ To C7 in the Simplified SchematicGo
Changed SwitcherPro™ Software tool To: WEBENCH Software tool in the Current Mode Compensation Design sectionGo
Changed R_O1 To: R5, R_O2 To R6, C₁ To C6, and C₂ To C7 in the Table 1Go
Changed the Output Voltage Set Point section. Updated the paragraph following Equation 5.Go

Changes from A Revision (March 2010) to B Revision

Figure 14, Changed V_IN = 18 V on the top (blue) curve To: V_IN = 8 VGo

Changes from * Revision (October 2008) to A Revision

Changed the Absolute Maximum Ratings table, Input Voltage - EN pin max value From: 5V to 6VGo
Added A table to the Description - with text "For additional design needs, see.."Go

6 Pin Configuration and Functions

D Package

Top View

Pin Functions

PIN		DESCRIPTION
NAME	NO.	DESCRIPTION
BOOT	1	A 0.1 μF bootstrap capacitor is required between BOOT and PH. If the voltage on this capacitor falls below the minimum requirement, the high-side MOSFET is forced to switch off until the capacitor is refreshed.
VIN	2	Input supply voltage, 3.5 V to 28 V.
EN	3	Enable pin. Pull below 1.25V to disable. Float to enable. Programming the input undervoltage lockout with two resistors is recommended.
SS	4	Slow start pin. An external capacitor connected to this pin sets the output rise time.
VSENSE	5	Inverting node of the gm error amplifier.
COMP	6	Error amplifier output, and input to the PWM comparator. Connect frequency compensation components to this pin.
GND	7	Ground.
PH	8	The source of the internal high-side power MOSFET.

7 Specifications

7.1 Absolute Maximum Ratings⁽¹⁾

over operating free-air temperature range (unless otherwise noted)

		MIN	MAX	UNIT
Input Voltage	VIN	–0.3	30	V
	EN	–0.3	6
	BOOT		38
	VSENSE	–0.3	3
	COMP	–0.3	3
	SS	–0.3	3
Output Voltage	BOOT-PH		8	V
	PH	–0.6	30
	PH (10 ns transient from ground to negative peak)		–5
Source Current	EN		100	μA
	BOOT		100	mA
	VSENSE		10	μA
	PH		6	A
Sink Current	VIN		6	A
	COMP		100	μA
	SS		200	μA
Operating Junction Temperature		–40	150	°C
Storage Temperature		–65	150	°C

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

7.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾	±2000	V
V_(ESD)	Electrostatic discharge	Charged-device model (CDM), per JEDEC specification JESD22-C101⁽²⁾	±500	V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

	MIN	TYP	MAX	UNIT
Operating Input Voltage on (VIN pin)	3.5		28	V
Operating junction temperature, T_J	–40		150	°C

7.4 Thermal Information

THERMAL METRIC⁽¹⁾		D	UNIT
THERMAL METRIC⁽¹⁾		8 PINS	UNIT
R_θJA	Junction-to-ambient thermal resistance	116.7	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	62.4
R_θJB	Junction-to-board thermal resistance	57.0
ψ_JT	Junction-to-top characterization parameter	14.5
ψ_JB	Junction-to-board characterization parameter	56.5
R_θJC(bot)	Junction-to-case (bottom) thermal resistance	N/A

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

7.5 Electrical Characteristics

T_J = –40°C to 150°C, VIN = 3.5V to 28V (unless otherwise noted)

PARAMETER	TEST CONDITIONS	MIN	TYP	MAX	UNIT
SUPPLY VOLTAGE (VIN PIN)
Internal undervoltage lockout threshold	Rising and Falling			3.5	V
Shutdown supply current	EN = 0V, VIN = 12V, –40°C to 85°C		1	4	μA
Operating – non switching supply current	VSENSE = 0.85 V		75	110	μA
ENABLE AND UVLO (EN PIN)
Enable threshold	Rising and Falling		1.25	1.35	V
Input current	Enable threshold – 50 mV		-1		μA
Input current	Enable threshold + 50 mV		-4		μA
VOLTAGE REFERENCE
Voltage reference		0.772	0.8	0.828	V
HIGH-SIDE MOSFET
On resistance	BOOT-PH = 3 V, VIN = 3.5 V		115	200	mΩ
On resistance	BOOT-PH = 6 V, VIN = 12 V		80	150	mΩ
ERROR AMPLIFIER
Error amplifier transconductance (gm)	–2 μA < I_(COMP) < 2 μA, V_(COMP)= 1 V		92		μmhos
Error amplifier DC gain⁽¹⁾	VSENSE = 0.8 V		800		V/V
Error amplifier unity gain bandwidth⁽¹⁾	5 pF capacitance from COMP to GND pins		2.7		MHz
Error amplifier source/sink current	V_(COMP) = 1 V, 100 mV overdrive		±7		μA
Switch current to COMP transconductance	VIN = 12 V		9		A/V
PULSE SKIPPING Eco-mode™
Pulse skipping Eco-mode™ switch current threshold			100		mA
CURRENT LIMIT
Current limit threshold	VIN = 12 V	2.3	3.5		A
THERMAL SHUTDOWN
Thermal Shutdown			165		°C
SLOW START (SS PIN)
Charge current	V_(SS) = 0.4 V		2		μA
SS to VSENSE matching	V_(SS) = 0.4 V		10		mV

(1) Specified by design

7.6 Switching Characteristics

T_J = –40°C to 150°C, VIN = 3.5 to 28 V (unless otherwise noted)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
SWITCHING FREQUENCY
	Device switching frequency	VIN = 12 V	210	300	390	kHz
	Minimum controllable on time	VIN = 12 V, 25°C		105	130	ns
	Maximum controllable duty ratio⁽¹⁾	BOOT-PH = 6 V	90%	93%