ZHCSMZ7A
December 2020 – June 2021
TLV320ADC5120
PRODUCTION DATA
1
特性
2
应用
3
说明
4
Revision History
5
Device Comparison Table
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Timing Requirements: I2C Interface
7.7
Switching Characteristics: I2C Interface
7.8
Timing Requirements: TDM, I2S or LJ Interface
7.9
Switching Characteristics: TDM, I2S or LJ Interface
7.10
Timing Requirements: PDM Digital Microphone Interface
7.11
Switching Characteristics: PDM Digital Microphone Interface
7.12
Timing Diagrams
7.13
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Serial Interfaces
8.3.1.1
Control Serial Interfaces
8.3.1.2
Audio Serial Interfaces
8.3.1.2.1
Time Division Multiplexed Audio (TDM) Interface
8.3.1.2.2
Inter IC Sound (I2S) Interface
8.3.1.2.3
Left-Justified (LJ) Interface
8.3.1.3
Using Multiple Devices With Shared Buses
8.3.2
Phase-Locked Loop (PLL) and Clock Generation
8.3.3
Input Channel Configurations
8.3.4
Reference Voltage
8.3.5
Programmable Microphone Bias
8.3.6
Signal-Chain Processing
8.3.6.1
Programmable Channel Gain and Digital Volume Control
8.3.6.2
Programmable Channel Gain Calibration
8.3.6.3
Programmable Channel Phase Calibration
8.3.6.4
Programmable Digital High-Pass Filter
8.3.6.5
Programmable Digital Biquad Filters
8.3.6.6
Programmable Channel Summer and Digital Mixer
8.3.6.7
Configurable Digital Decimation Filters
8.3.6.7.1
Linear Phase Filters
8.3.6.7.1.1
Sampling Rate: 7.35 kHz to 8 kHz
8.3.6.7.1.2
Sampling Rate: 14.7 kHz to 16 kHz
8.3.6.7.1.3
Sampling Rate: 22.05 kHz to 24 kHz
8.3.6.7.1.4
Sampling Rate: 29.4 kHz to 32 kHz
8.3.6.7.1.5
Sampling Rate: 44.1 kHz to 48 kHz
8.3.6.7.1.6
Sampling Rate: 88.2 kHz to 96 kHz
8.3.6.7.1.7
Sampling Rate: 176.4 kHz to 192 kHz
8.3.6.7.1.8
Sampling Rate: 352.8 kHz to 384 kHz
8.3.6.7.1.9
Sampling Rate: 705.6 kHz to 768 kHz
8.3.6.7.2
Low-Latency Filters
8.3.6.7.2.1
Sampling Rate: 14.7 kHz to 16 kHz
8.3.6.7.2.2
Sampling Rate: 22.05 kHz to 24 kHz
8.3.6.7.2.3
Sampling Rate: 29.4 kHz to 32 kHz
8.3.6.7.2.4
Sampling Rate: 44.1 kHz to 48 kHz
8.3.6.7.2.5
Sampling Rate: 88.2 kHz to 96 kHz
8.3.6.7.2.6
Sampling Rate: 176.4 kHz to 192 kHz
8.3.6.7.3
Ultra-Low Latency Filters
8.3.6.7.3.1
Sampling Rate: 14.7 kHz to 16 kHz
8.3.6.7.3.2
Sampling Rate: 22.05 kHz to 24 kHz
8.3.6.7.3.3
Sampling Rate: 29.4 kHz to 32 kHz
8.3.6.7.3.4
Sampling Rate: 44.1 kHz to 48 kHz
8.3.6.7.3.5
Sampling Rate: 88.2 kHz to 96 kHz
8.3.6.7.3.6
Sampling Rate: 176.4 kHz to 192 kHz
8.3.6.7.3.7
Sampling Rate: 352.8 kHz to 384 kHz
8.3.7
Dynamic Range Enhancer (DRE)
8.3.8
Dynamic Range Compressor (DRC)
8.3.9
Automatic Gain Controller (AGC)
8.3.10
Voice Activity Detection (VAD)
8.3.11
Digital PDM Microphone Record Channel
8.3.12
Interrupts, Status, and Digital I/O Pin Multiplexing
8.4
Device Functional Modes
8.4.1
Sleep Mode or Software Shutdown
8.4.2
Active Mode
8.4.3
Software Reset
8.5
Programming
8.5.1
Control Serial Interfaces
8.5.1.1
I2C Control Interface
8.5.1.1.1
General I2C Operation
8.5.1.1.2
I2C Single-Byte and Multiple-Byte Transfers
8.5.1.1.2.1
I2C Single-Byte Write
8.5.1.1.2.2
I2C Multiple-Byte Write
8.5.1.1.2.3
I2C Single-Byte Read
8.5.1.1.2.4
I2C Multiple-Byte Read
8.6
Register Maps
8.6.1
Device Configuration Registers
8.6.1.1
TLV320ADC5120 Access Codes
8.6.2
Page 0 Registers
8.6.3
Page 1 Registers
8.6.4
Programmable Coefficient Registers
8.6.4.1
Programmable Coefficient Registers: Page 2
8.6.4.2
Programmable Coefficient Registers: Page 3
8.6.4.3
Programmable Coefficient Registers: Page 4
9
Application and Implementation
9.1
Application Information
9.2
Typical Applications
9.2.1
Two-Channel Analog Microphone Recording
9.2.1.1
Design Requirements
9.2.1.2
Detailed Design Procedure
9.2.1.2.1
Example Device Register Configuration Script for EVM Setup
9.2.1.3
Application Curves
9.2.2
Four-Channel Digital PDM Microphone Recording
9.2.2.1
Design Requirements
9.2.2.2
Detailed Design Procedure
9.2.2.2.1
Example Device Register Configuration Script for EVM Setup
9.3
What to Do and What Not to Do
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Documentation Support
12.1.1
Related Documentation
12.2
接收文档更新通知
12.3
支持资源
12.4
Trademarks
12.5
Electrostatic Discharge Caution
12.6
术语表
13
Mechanical, Packaging, and Orderable Information
封装选项
机械数据 (封装 | 引脚)
RTE|20
MPQF596
散热焊盘机械数据 (封装 | 引脚)
订购信息
zhcsmz7a_oa
zhcsmz7a_pm
1
特性
多通道高性能 ADC:
2 通道模拟麦克风输入或线路输入
4 通道数字 PDM 麦克风
多达 2 个模拟和多达 2 个数字麦克风通道
ADC 线路和麦克风差分输入性能:
动态范围 (DR):
120dB,动态范围增强器 (DRE) 启用
108dB,DRE 禁用
THD+N:-95dB
ADC 通道相加模式,DR 性能:
111dB,DRE 禁用,2 通道相加
ADC 输入电压:
差分 2V
RMS
满量程输入
单端 1V
RMS
满量程输入
ADC 采样率 (f
S
) = 8kHz 至 768kHz
可编程通道设置:
通道增益:0dB 至 42dB,步长 0.5dB
数字音量控制:–100dB 至 27dB
增益校准分辨率为 0.1dB
相位校准分辨率为 163ns
可编程麦克风偏置或电源电压生成
低延迟信号处理滤波器选择
可编程 HPF 和双二阶数字滤波器
自动增益控制器 (AGC)
话音激活检测 (VAD)
I
2
C 控制接口
集成高性能音频 PLL
自动时钟分频器设置配置
音频串行数据接口:
格式:TDM、I
2
S 或左平衡 (LJ)
字长:16 位、20 位、24 位或 32 位
主/从接口
单电源运行:3.3V 或 1.8V
I/O 电源运行:3.3V 或 1.8V
1.8V AVDD 电源电压下的功耗:
9.5mW/通道(48kHz 采样率)
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