TPS6229x-Q1 1-A Step Down Converter in 2-mm × 2-mm SON Package
1 Features
- Qualified for Automotive Applications
- High Efficiency Step-Down Converter
- Output Current up to 1000 mA
- VIN Range From 2.3 V to 6 V
- 2.25-MHz Fixed Frequency Operation
- Power Save Mode at Light Load Currents
- Output Voltage Accuracy in PWM mode ±1.5%
- Fixed Output Voltage Options
- Typical 15-µA Quiescent Current
- 100% Duty Cycle for Lowest Dropout
- Voltage Positioning at Light Loads
- Available in a 2-mm × 2-mm × 0.8-mm SON Package
2 Applications
3 Description
The TPS6229x-Q1 is a highly efficient synchronous step-down buck converter optimized for automotive low input voltage applications, and provides up to 1000-mA output current..
With an input voltage range of 2.3 V to 6 V, and an output voltage accuracy of 1.5%, the device powers a large variety of automotive applications.
The TPS6229x-Q1 operates at 2.25-MHz fixed switching frequency and enters Power Save Mode operation with typical quiescent current of 15 µA at light load currents to maintain a high efficiency over the entire load current range.
The Power Save Mode is optimized for low output voltage ripple. For low noise applications, the device can be forced into fixed frequency PWM mode by pulling the MODE pin high. In the shutdown mode, the current consumption is reduced to less than 1 µA. The TPS6229x-Q1 allows the use of small inductors and capacitors to achieve a small solution size.
The TPS6229x-Q1 is available in a 2-mm × 2-mm
6-pin SON package.
Device Information(1)
| PART NUMBER | PACKAGE | BODY SIZE (NOM) |
|---|---|---|
| TPS6229x-Q1 | SON (6) | 2.00 mm × 2.00 mm |
- For all available packages, see the orderable addendum at the end of the data sheet.
Typical Application Schematic
Efficiency vs Output Current
4 Revision History
Changes from A Revision (April 2013) to B Revision
- Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section Go
- Deleted all references to TPS62291-Q1 Go
- Changed description text for MODE in Pin Functions tableGo
- Added PowerPAD row to Pin Functions table Go
- Changed Thermal Information table Go
- Deleted Dissipation Ratings Go
- Deleted List of Components table from Design Requirements Go
- Deleted List of Inductors table from Inductor SelectionGo
- Deleted List of Capacitors table from Input Capacitor Selection Go
- Deleted TPS62291DRV Fixed 3.3 V application from the data sheetGo
Changes from * Revision (April 2013) to A Revision
- Deleted Ordering Information Table.Go
5 Pin Configuration and Functions
Pin Functions
| PIN | TYPE | DESCRIPTION | |
|---|---|---|---|
| NO. | NAME | ||
| 1 | SW | O | This is the switch pin and is connected to the internal MOSFET switches. Connect the external inductor between this terminal and the output capacitor. |
| 2 | MODE | I | Pulling this pin to high forces the device to operate in fixed-frequency PWM mode. Pulling this pin to low enables the Power Save Mode with automatic transition from PFM mode to fixed-frequency PWM mode. |
| 3 | FB | I | Feedback Pin for the internal regulation loop. Connect the external resistor divider to this pin. In case of fixed output voltage option, connect this pin directly to the output capacitor |
| 4 | EN | I | This is the enable pin of the device. Pulling this pin to low forces the device into shutdown mode. Pulling this pin to high enables the device. This pin must be terminated. |
| 5 | VIN | PWR | VIN power supply pin. |
| 6 | GND | GND | GND supply pin |
| — | PowerPAD | GND | GND pin must be electrically connected to the exposed pad on the printed-circuit board for proper operation. |
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)| MIN | MAX | UNIT | |||
|---|---|---|---|---|---|
| VI | Input voltage(2) | –0.3 | 7 | V | |
| Voltage at EN, MODE | –0.3 | VIN +0.3, ≤ 7 | |||
| Voltage on SW(3) | –0.3 | 7 | |||
| Peak output current | Internally limited | A | |||
| TJ | Maximum operating junction temperature | –40 | 125 | °C | |
| Tstg | Storage temperature | –65 | 150 | ||
6.2 ESD Ratings
| VALUE | UNIT | |||
|---|---|---|---|---|
| V(ESD) | Electrostatic discharge | Human-body model (HBM), per AEC Q100-002(1) | ±2000 | V |
| Charged-device model (CDM), per AEC Q100-011 | ±1000 | |||
6.3 Recommended Operating Conditions
6.4 Thermal Information
| THERMAL METRIC(1) | TPS6229x-Q1 | UNIT | |
|---|---|---|---|
| DRV (SON) | |||
| 6 PINS | |||
| RθJA | Junction-to-ambient thermal resistance | 67.8 | °C/W |
| RθJC(top) | Junction-to-case (top) thermal resistance | 88.5 | °C/W |
| RθJB | Junction-to-board thermal resistance | 37.2 | °C/W |
| ψJT | Junction-to-top characterization parameter | 2 | °C/W |
| ψJB | Junction-to-board characterization parameter | 37.6 | °C/W |
| RθJC(bot) | Junction-to-case (bottom) thermal resistance | 7.9 | °C/W |
6.5 Electrical Characteristics
Over full operating ambient temperature range, typical values are at TA = 25°C. Unless otherwise noted, specifications apply for condition VIN = EN = 3.6 V. External components CIN = 4.7 µF 0603, COUT = 10 µF 0603, L = 2.2 µH, see Parameter Measurement Information.| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||||
|---|---|---|---|---|---|---|---|---|---|
| SUPPLY | |||||||||
| VI | Input voltage | 2.3 | 6 | V | |||||
| IO | Output current(4) | VIN 2.7 V to 6 V | 1000 | mA | |||||
| VIN 2.5 V to 2.7 V | 600 | ||||||||
| VIN 2.3 V to 2.5 V | 300 | ||||||||
| IQ | Operating quiescent current | IO = 0 mA, PFM mode enabled (MODE = GND) device not switching, See (1) |
15 | µA | |||||
| IO = 0 mA, switching with no load, (MODE = VIN) PWM operation, VO = 1.8 V, VIN = 3V |
3.8 | mA | |||||||
| ISD | Shutdown current | EN = GND | TA = 25°C | 0.1 | 1 | µA | |||
| TA = 105°C | 2.5 | ||||||||
| UVLO | Undervoltage lockout threshold | Falling | 1.85 | V | |||||
| Rising | 1.95 | ||||||||
| ENABLE, MODE | |||||||||
| VIH | High level input voltage, EN, MODE | 2.3 V ≤ VIN ≤ 6 V | 1 | VIN | V | ||||
| VIL | Low level input voltage, EN, MODE | 2.3 V ≤ VIN ≤ 6 V | 0 | 0.4 | V | ||||
| II | Input bias current, EN, MODE | EN, MODE = GND or VIN | 0.01 | 1 | µA | ||||
| POWER SWITCH | |||||||||
| RDS(on) | High-side MOSFET ON-resistance | VIN = VGS = 3.6 V, TA = 25°C | 240 | 480 | mΩ | ||||
| Low-side MOSFET ON-resistance | 185 | 380 | |||||||
| ILIMF | Forward current limit MOSFET high-side and low-side | VIN = VGS = 3.6 V, TA = 25°C | 1.19 | 1.4 | 1.78 | A | |||
| TSD | Thermal shutdown | Increasing junction temperature | 140 | °C | |||||
| Thermal shutdown hysteresis | Decreasing junction temperature | 20 | |||||||
| OSCILLATOR | |||||||||
| fSW | Oscillator frequency | 2.3 V ≤ VIN ≤ 6 V | 2 | 2.25 | 2.5 | MHz | |||
| OUTPUT | |||||||||
| VO | Adjustable output voltage range | 0.6 | VI | V | |||||
| Vref | Reference voltage | 600 | mV | ||||||
| VFB(PWM) | Feedback voltage | MODE = VIN, PWM operation, 2.3 V ≤ VIN ≤ 6 V, See (2) |
–1.5% | 0% | 1.5% | ||||
| VFB(PFM) | Feedback voltage PFM mode | MODE = GND, device in PFM mode, +1% voltage positioning active, See (1) | 1% | ||||||
| Load regulation | –0.5 | %/A | |||||||
| tStart Up | Start-up time | Time from active EN to reach 95% of VO | 500 | µs | |||||
| tRamp | VO ramp-up time | Time to ramp from 5% to 95% of VO | 250 | µs | |||||
| Ilkg | Leakage current into SW pin | VI = 3.6 V, VI = VO = VSW, EN = GND, See (3) |
0.1 | 1 | µA | ||||
6.6 Typical Characteristics
Table 1. Table of Graphs
| FIGURE NO. | ||
|---|---|---|
| Shutdown Current into VIN | vs Input Voltage, (TA = 85°C, TA = 25°C, TA = –40°C) | Figure 1 |
| Quiescent Current | vs Input Voltage, (TA = 85°C, TA = 25°C, TA = –40°C) | Figure 2 |
| Static Drain-Source ON-State Resistance | vs Input Voltage, (TA = 85°C, TA = 25°C, TA = –40°C) | Figure 3 |
| Figure 4 | ||
7 Parameter Measurement Information
Figure 5. Parameter Measurement Test Setup
8 Detailed Description
8.1 Overview
The TPS6229x-Q1 step-down converter operates with typically 2.25-MHz fixed frequency pulse width modulation (PWM) at moderate to heavy load currents. At light-load currents, the converter can automatically enter Power Save Mode and operates then in PFM mode.
During PWM operation, the converter uses a unique fast-response voltage mode controller scheme with input voltage feedforward to achieve good line and load regulation, allowing the use of small ceramic input and output capacitors. At the beginning of each clock cycle initiated by the clock signal, the high-side MOSFET switch is turned on. The current flows now from the input capacitor through the high-side MOSFET switch through the inductor to the output capacitor and load. During this phase, the current ramps up until the PWM comparator trips and the control logic turns off the switch. The current limit comparator also turns off the switch if the current limit of the high-side MOSFET switch is exceeded. After a dead time preventing shoot-through current, the low-side MOSFET rectifier is turned on, and the inductor current ramps down. The current flows now from the inductor to the output capacitor and to the load. It returns to the inductor through the low-side MOSFET rectifier.
The next cycle is initiated by the clock signal again turning off the low-side MOSFET rectifier and turning on the high-side MOSFET switch.
8.2 Functional Block Diagram
8.3 Feature Description
8.3.1 Power Save Mode
The Power Save Mode is enabled with MODE Pin set to low level. If the load current decreases, the converter enters Power Save Mode operation automatically. During Power Save Mode, the converter skips switching and operates with reduced frequency in PFM mode with a minimum quiescent current to maintain high efficiency. The converter positions the output voltage typically +1% above the nominal output voltage. This voltage positioning feature minimizes voltage drops caused by a sudden load step.
The transition from PWM mode to PFM mode occurs once the inductor current in the low-side MOSFET switch becomes zero, which indicates discontinuous conduction mode.
During the Power Save Mode the output voltage is monitored with a PFM comparator. As the output voltage falls below the PFM comparator threshold of VOUT nominal +1%, the device starts a PFM current pulse. For this the high-side MOSFET switch turns on and the inductor current ramps up. After the ON-time expires, the switch is turned off, and the low-side MOSFET switch is turned on until the inductor current becomes zero.
The converter effectively delivers a current to the output capacitor and the load. If the load is below the delivered current, the output voltage rises. If the output voltage is equal or higher than the PFM comparator threshold, the device stops switching and enters a sleep mode with typical 15-µA current consumption.
If the output voltage is still below the PFM comparator threshold, a sequence of further PFM current pulses are generated until the PFM comparator threshold is reached. The converter starts switching again once the output voltage drops below the PFM comparator threshold.
With a fast single-threshold comparator, the output voltage ripple during PFM mode operation can be kept small. The PFM Pulse is time controlled, which allows modification of the charge transferred to the output capacitor by the value of the inductor. The resulting PFM output voltage ripple and PFM frequency depend in first order on the size of the output capacitor and the inductor value. Increasing output capacitor values and inductor values minimizes the output ripple. The PFM frequency decreases with smaller inductor values and increases with larger values.
The PFM mode is left and PWM mode entered in case the output current can not longer be supported in PFM mode. The Power Save Mode can be disabled through the MODE pin set to high. The converter then operates in fixed frequency PWM mode.
8.3.1.1 Dynamic Voltage Positioning
This feature reduces the voltage undershoots and overshoots at load steps from light to heavy load and vice versa. It is active in Power Save Mode and regulates the output voltage 1% higher than the nominal value. This provides more headroom for both the voltage drop at a load step, and the voltage increase at a load throw-off.
Figure 6. Power Save Mode Operation
8.3.1.2 100% Duty Cycle Low Dropout Operation
The device starts to enter 100% duty cycle Mode once the input voltage comes close the nominal output voltage. To maintain the output voltage, the high-side MOSFET switch is turned on 100% for one or more cycles.
With further decreasing VIN, the high-side MOSFET switch is turned on completely. In this case, the converter offers a low input-to-output voltage difference. This is particularly useful in battery-powered applications to achieve longest operation time by taking full advantage of the whole range of the battery voltage.
The minimum input voltage to maintain regulation depends on the load current and output voltage, and can be calculated using Equation 1.
where
- IOmax = maximum output current plus inductor ripple current
- RDS(on)max = maximum P-channel switch RDS(on)
- RL = DC resistance of the inductor
- VOmax = nominal output voltage plus maximum output voltage tolerance
8.3.1.3 Undervoltage Lockout
The undervoltage lockout circuit prevents the device from malfunctioning at low input voltages and from excessive discharge of the battery and disables the output stage of the converter. The undervoltage lockout threshold is typically 1.85 V with falling VIN.
8.3.2 Enable
The device is enabled setting EN pin to high. During the start-up time, tStart Up, the internal circuits are settled. Afterwards, the device activates the soft-start circuit. The EN input can be used to control power sequencing in a system with various DC-DC converters. The EN pin can be connected to the output of another converter, to drive the EN pin high and getting a sequencing of supply rails. With EN = GND, the device enters shutdown mode. In this mode, all circuits are disabled. In fixed output voltage versions, the internal resistor divider network is disconnected from FB pin.
8.3.3 Soft Start
The TPS6229x-Q1 has an internal soft-start circuit that controls the ramp-up of the output voltage. The output voltage ramps up from 5% to 95% of its nominal value within typical 250 µs. This limits the inrush current in the converter during ramp-up, and prevents possible input voltage drops when a battery or high-impedance power source is used. The soft-start circuit is enabled within the start-up time (tStart Up).
8.3.4 Short-Circuit Protection
The high-side and low-side MOSFET switches are short-circuit protected with maximum switch current = ILIMF. The current in the switches is monitored by current limit comparators. Once the current in the high-side MOSFET switch exceeds the threshold of its current limit comparator, it turns off and the low-side MOSFET switch is activated to ramp down the current in the inductor and high-side MOSFET switch. The high-side MOSFET switch can only turn on again, once the current in the low-side MOSFET switch has decreased below the threshold of its current limit comparator.
8.3.5 Thermal Shutdown
As soon as the junction temperature, TJ, exceeds 140°C (typical) the device goes into thermal shutdown. In this mode, the high-side and low-side MOSFETs are turned off. The device continues its operation when the junction temperature falls below the thermal shutdown hysteresis.
8.4 Device Functional Modes
The MODE pin allows mode selection between forced PWM mode and Power Save Mode.
Connecting this pin to GND enables the Power Save Mode with automatic transition between PWM and PFM mode. Pulling the MODE pin high forces the converter to operate in fixed frequency PWM mode even at light load currents. This allows simple filtering of the switching frequency for noise-sensitive applications. In this mode, the efficiency is lower compared to the Power Save Mode during light loads.
The condition of the MODE pin can be changed during operation and allows efficient power management by adjusting the operation mode of the converter to the specific system requirements.
Table 2. Device Functional Modes
| MODE PIN | FUNCTIONAL MODE |
|---|---|
| 0 | Forced PWM |
| 1 | PFM mode at light loads |
9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
9.1 Application Information
The TPS6229x devices are high-efficiency, synchronous, step-down DC-DC converters featuring Power Save Mode or 2.25-MHz fixed frequency operation.
9.2 Typical Applications
9.2.1 TPS62290DRV Adjustable 1.8 V
Figure 7. TPS62290DRV Adjustable 1.8-V Schematic
9.2.1.1 Design Requirements
The design guideline provides a component selection to operate the device within the recommended operating condition.
9.2.1.2 Detailed Design Procedure
9.2.1.2.1 Output Voltage Setting
The output voltage can be calculated by Equation 2:
with an internal reference voltage VREF typical 0.6 V.
To minimize the current through the feedback divider network, R2 must be 180 kΩ or 360 kΩ. The sum of R1 and R2 must not exceed approximately 1 MΩ, to keep the network robust against noise. An external feedforward capacitor C1 is required for optimum load transient response. The value of C1 must be in the range between 22 pF and 33 pF.
Route the FB line away from noise sources, such as the inductor or the SW line.
9.2.1.2.2 Output Filter Design (Inductor and Output Capacitor)
The TPS6229x-Q1 is designed to operate with inductors in the range of 1.5 µH to 4.7 µH and with output capacitors in the range of 4.7 µF to 22 µF. The part is optimized for operation with a 2.2-µH inductor and 10-µF output capacitor. Larger or smaller inductor values can be used to optimize the performance of the device for specific operation conditions. For stable operation, the L and C values of the output filter must not fall below 1-µH effective inductance and 3.5-µF effective capacitance.
9.2.1.2.2.1 Inductor Selection
The inductor value has a direct effect on the ripple current. The selected inductor has to be rated for its DC resistance and saturation current. The inductor ripple current (ΔIL) decreases with higher inductance and increases with higher VI or VO.
The inductor selection has also impact on the output voltage ripple in PFM mode. Higher inductor values lead to lower output voltage ripple and higher PFM frequency, lower inductor values lead to a higher output voltage ripple but lower PFM frequency.
Equation 3 calculates the maximum inductor current under static load conditions. The saturation current of the inductor must be rated higher than the maximum inductor current as calculated with Equation 4. This is recommended because during heavy load transient the inductor current rises above the calculated value.
where
- f = Switching Frequency (2.25 MHz typical)
- L = Inductor Value
- ΔIL = Peak to Peak inductor ripple current
- ILmax = Maximum Inductor current
A more conservative approach is to select the inductor current rating just for the maximum switch current of the corresponding converter.
Accepting larger values of ripple current allows the use of low inductance values, but results in higher output voltage ripple, greater core losses, and lower output current capability.
The total losses of the coil have a strong impact on the efficiency of the DC-DC conversion and consist of both the losses in the DC resistance (R(DC)) and the following frequency-dependent components.
9.2.1.2.2.2 Output Capacitor Selection
The advanced fast-response voltage mode control scheme of the TPS6229x-Q1 allows the use of tiny ceramic capacitors. Ceramic capacitors with low ESR values have the lowest output voltage ripple and are recommended. The output capacitor requires either an X7R or X5R dielectric. Y5V and Z5U dielectric capacitors, aside from their wide variation in capacitance overtemperature, become resistive at high frequencies.
At nominal load current, the device operates in PWM mode and the RMS ripple current is calculated as shown in Equation 5.
At nominal load current, the device operates in PWM mode and the overall output voltage ripple is the sum of the voltage spike caused by the output capacitor ESR plus the voltage ripple caused by charging and discharging the output capacitor as shown in Equation 6:
At light load currents, the converter operates in Power Save Mode, and the output voltage ripple is dependent on the output capacitor and inductor value. Larger output capacitor and inductor values minimize the voltage ripple in PFM mode and tighten DC output accuracy in PFM mode.
9.2.1.2.2.3 Input Capacitor Selection
The buck converter has a natural pulsating input current; therefore, a low ESR input capacitor is required for best input voltage filtering and minimizing the interference with other circuits caused by high input voltage spikes. For most applications, TI recommends a 10-µF ceramic capacitor. The input capacitor can be increased without any limit for better input voltage filtering.
Take care when using only small ceramic input capacitors. When a ceramic capacitor is used at the input and the power is being supplied through long wires, such as from a wall adapter, a load step at the output or VIN step on the input can induce ringing at the VIN pin. The ringing can couple to the output and be mistaken as loop instability or could even damage the part by exceeding the maximum ratings.
9.2.1.3 Application Curves
9.2.2 TPS62290DRV Adjustable 3.3 V
Figure 18. TPS62290DRV Adjustable 3.3-V Schematic
9.2.2.1 Design Requirements
For a 3.3-V output, the only change compared to the previous example is the feedback divider. A higher supply voltage is required to support the dropout to 3.3 V.
9.2.2.2 Detailed Design Procedure
For a 3.3-V output, the feedback-divider must be selected to provide the reference voltage of 0.6 V at FB-pin. Here, 820 kΩ for the upper resistor and 182 kΩ for the lower resistor was chosen.
9.2.3 TPS62293DRV Fixed 1.8 V
Figure 23. TPS62293DRV Fixed 1.8-V Schematic
9.2.3.1 Design Requirements
For a fixed 1.8-V output, the feedback dividers are not required. Obviously, a higher supply voltage is required to support the dropout to 1.8 V.
10 Power Supply Recommendations
Apply a preregulated voltage of 2.3 V to 6 V to the VIN-pin of the device. For higher output voltages, the supply voltage must support the dropout.