SLUSDV5B
October 2019 – April 2020
UCC5304
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Device Images
Typical Application
4
Revision History
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Power Ratings
6.6
Insulation Specifications
6.7
Safety-Related Certifications
6.8
Safety-Limiting Values
6.9
Electrical Characteristics
6.10
Switching Characteristics
6.11
Typical Characteristics
7
Parameter Measurement Information
7.1
Rising and Falling Time
7.2
Power-up UVLO Delay to OUTPUT
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
VDD, VCCI, and Under Voltage Lock Out (UVLO)
8.3.2
Input Stage
8.3.3
Output Stage
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Designing IN pin Input Filter
9.2.2.2
Estimating Junction Temperature
9.2.2.3
Selecting VCCI and VDD Capacitors
9.2.2.3.1
Selecting a VCCI Capacitor
9.2.2.3.2
Selecting a VDD Capacitor
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.1.1
Component Placement Considerations
11.1.2
Grounding Considerations
11.1.3
High-Voltage Considerations
11.1.4
Thermal Considerations
11.2
Layout Example
12
Mechanical, Packaging, and Orderable Information
封装选项
机械数据 (封装 | 引脚)
DWV|8
MPDS382B
散热焊盘机械数据 (封装 | 引脚)
订购信息
slusdv5b_oa
1
Features
Reinforced isolation
Single channel in DWV Package with 8.5-mm creepage distance
CMTI greater than 100-V/ns
4-A peak source, 6-A peak sink output
Switching parameters:
40-ns maximum propagation delay
5-ns maximum delay matching
5.5-ns maximum pulse-width distortion
35-µs maximum VDD power-up delay
Up to 18-V VDD output drive supply
5-V VDD UVLO
Operating temp. range (T
A
) –40°C to 125°C
Rejects input pulses shorter than 5-ns
TTL and CMOS compatible inputs
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