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DACx3608 Octal, 10-Bit or 8-Bit, I2CTM Interface, Buffered Voltage Output DACs in Tiny 3 × 3 WQFN Package
SLASEQ4A
October 2018 – December 2018
DAC43608
,
DAC53608
PRODUCTION DATA.
CONTENTS
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DACx3608 Octal, 10-Bit or 8-Bit, I2CTM Interface, Buffered Voltage Output DACs in Tiny 3 × 3 WQFN Package
1
Features
2
Applications
3
Description
Device Images
Simplified Block Diagram
Programmable Window Comparator
4
Revision History
5
Device Comparison Table
6
Pin Configurations and Functions
Pin Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Timing Requirements: I2CTM Standard Mode
7.7
Timing Requirements: I2CTM Fast Mode
7.8
Timing Requirements: I2CTM Fast+ Mode
7.9
Timing Requirements: Logic
7.10
Typical Characteristics: 1.8 V
7.11
Typical Characteristics: 5.5 V
7.12
Typical Characteristics
7.13
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Digital-to-Analog Converter (DAC) Architecture
8.3.1.1
DAC Transfer Function
8.3.1.2
DAC Register Update and LDAC Functionality
8.3.1.3
CLR Functionality
8.3.1.4
Output Amplifier
8.3.2
Reference
8.3.3
Power-on-Reset (POR)
8.3.4
Software Reset
8.4
Device Functional Modes
8.4.1
Power-Down Mode
8.5
Programming
8.5.1
F/S Mode Protocol
8.5.2
DACx3608 I2CTM Update Sequence
8.5.3
DACx3608 Address Byte
8.5.4
DACx3608 Command Byte
8.5.5
DACx3608 Data Byte (MSDB and LSDB)
8.5.6
DACx3608 I2CTM Read Sequence
8.6
Register Map
8.6.1
DEVICE_CONFIG Register (offset = 01h) [reset = 00FFh]
Table 10.
DEVICE_CONFIG Register Field Descriptions
8.6.2
STATUS/TRIGGER Register (offset = 02h) [reset = 0300h for DAC53608, reset = 0500h for DAC43608]
Table 11.
STATUS/TRIGGER Register Field Descriptions
8.6.3
BRDCAST Register (offset = 03h) [reset = 0000h]
Table 12.
BRDCAST Register Field Descriptions
8.6.4
DACn_DATA Register (offset = 08h to 0Fh) [reset = 0000h]
Table 13.
DACn_DATA Register Field Descriptions
9
Application and Implementation
9.1
Application Information
9.2
Typical Applications
9.2.1
Programmable LED Biasing
9.2.1.1
Design Requirements
9.2.1.2
Detailed Design Procedure
9.2.1.3
Application Curve
9.2.2
Programmable Window Comparator
9.2.2.1
Design Requirements
9.2.2.2
Detailed Design Procedure
9.2.2.3
Application Curve
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Documentation Support
12.1.1
Related Documentation
12.2
Related Links
12.3
Receiving Notification of Documentation Updates
12.4
Community Resources
12.5
Trademarks
12.6
Electrostatic Discharge Caution
12.7
Glossary
13
Mechanical, Packaging, and Orderable Information
IMPORTANT NOTICE
Package Options
Mechanical Data (Package|Pins)
RTE|16
MPQF149D
Thermal pad, mechanical data (Package|Pins)
RTE|16
QFND525B
Orderable Information
slaseq4a_oa
slaseq4a_pm
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