SBOS051F
October 1995 – May 2022
INA128
,
INA129
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Device Comparison Table
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Noise Performance
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.1.1
Input Common-Mode Range
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Setting the Gain
9.2.2.2
Dynamic Performance
9.2.2.3
Offset Trimming
9.2.2.4
Input Bias Current Return Path
9.2.3
Application Curves
9.3
System Examples
10
Power Supply Recommendations
10.1
Low-Voltage Operation
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Device Support
12.1.1
Development Support
12.1.1.1
PSpice® for TI
12.1.1.2
TINA-TI™ Simulation Software (Free Download)
12.2
Documentation Support
12.2.1
Related Documentation
12.3
Receiving Notification of Documentation Updates
12.4
Support Resources
12.5
Trademarks
12.6
Electrostatic Discharge Caution
12.7
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
D|8
MSOI002K
P|8
MPDI001B
Thermal pad, mechanical data (Package|Pins)
Orderable Information
sbos051f_oa
sbos051f_pm
1
Features
Low offset voltage: 50 μV, maximum
Low drift: 0.5 μV/°C, maximum
Low input bias current: 5 nA, maximum
Low noise: 8 nV/√
Hz
, 0.2 μVpp
High CMR: 120 dB, minimum
Bandwidth: 1.3 MHz (G = 1)
Inputs protected to ±40 V
Wide supply range: ±2.25 V to ±18 V
Low quiescent current: 700 μA
Packages: 8-pin plastic DIP, SO-8
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