SCLS751 March   2016 SN74HC595B

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Pin Configuration and Functions
  5. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Switching Characteristics
    8. 5.8 Operating Characteristics
    9. 5.9 Typical Characteristics
  6. Parameter Measurement Information
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

1 Features

  • 8-Bit Serial-In, Parallel-Out Shift Registers
  • Available in Ultra Small Logic QFN package(0.5 mm max height)
  • Over-Voltage Tolerant on Inputs Independent of Vcc
  • Wide Operating Voltage Range of 2 V to 6 V
  • High-Current 3-State Outputs Can Drive Up to 15 LSTTL Loads
  • Low Power Consumption: 80-μA (Maximum) ICC
  • tpd = 13 ns (Typical)
  • ±6-mA Output Drive at 5 V
  • Low Input Current: 1 μA (Maximum)
  • Shift Register Has Direct Clear
  • -55oC to 125oC Operating Temperature

2 Applications

  • Network Switches
  • Factory Automation
  • Mobile Wearables
  • Industrial Building Automation
  • Power Infrastructure
  • LED Displays
  • Servers

3 Description

The SN74HC595B devices contain an 8-bit, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift register and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and serial outputs for cascading. When the output-enable (OE) input is high, the all outputs are in the high-impedance state except QH'.

Table 1. Device Information

PART NUMBER PACKAGE (PINS) BODY SIZE (NOM)
SN74HC595BRWN X1QFN (16) 2.50 mm x 2.50 mm
  1. For available package, see the orderable addendum at the end of the data sheet.

Logic Diagram (Positive Logic)

SN74HC595B fbd_SCLS751.gif