SLLSE19F December 2009 – July 2016 TPD12S015
PRODUCTION DATA.
The TPD12S015 device is an integrated HDMI ESD solution. The device pin mapping matches the HDMI Type C and Type D connector with four differential pairs. This device offers eight low-capacitance ESD clamps, allowing HDMI 1.3 or 1.4 data rates. The integrated ESD clamps and resistors provide good matching between each differential signal pair, which allows an advantage over discrete ESD clamp solutions where variations between ESD clamps degrade the differential signal quality.
The TPD12S015 provides a regulated 5-V output (5VOUT) for sourcing the HDMI power line. The regulated 5-V output supplies up to 55 mA to the HDMI receiver. The control of 5VOUT and the hot plug detect (HPD) circuitry is independent of the LS_OE control signal and is controlled by the CT_CP_HPD pin. This independent control enables the detection scheme (5VOUT + HPD) to be active before enabling the HDMI link.
There are three noninverting, bidirectional translation circuits for the SDA, SCL, and CEC lines. Each have a common power rail (VCCA) on the A side from 1.1 V to 3.6 V . On the B side, the SCL_B and SDA_B each have an internal 1.75-kΩ pullup connected to the regulated 5-V rail (5VOUT). The SCL and SDA pins meet the I2C specification and drive up to 750-pF loads. The CEC_B pin has an internal 27-kΩ pullup to an internal 3.3-V supply.
The HPD_B port has a glitch filter to avoid false detection due to the bouncing while inserting the HDMI plug.
The TPD12S015 provides IEC61000-4-2 (Level 4) ESD protection. This device is offered in a space-saving 1.6-mm × 2.8-mm wafer-level chip scale package [DSBGA (YFF)] with a 0.4-mm pitch.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
TPD12S015 | DSBGA (28) | 1.56 mm × 2.76 mm |
Changes from E Revision (June 2013) to F Revision
Changes from D Revision (April 2012) to E Revision
Changes from C Revision (November 2010) to D Revision
Changes from B Revision (July 2010) to C Revision