JAJSQV3C february   2008  – july 2023 TPD6E004

PRODUCTION DATA  

1.   1
2. 1 特長
3. 2 アプリケーション
4. 3 概要
5. 4 Revision History
6. 5 Pin Configuration and Functions
7. 6 Specifications
   1. 6.1 Absolute Maximum Ratings #GUID-506F33E9-2D36-4FA4-A00D-A85E2C505B35/SLLS7994401
   2. 6.2 ESD Ratings
   3. 6.3 ESD Ratings – Surge Protection
   4. 6.4 Recommended Operating Conditions
   5. 6.5 Thermal Information
   6. 6.6 Electrical Characteristics
   7. 6.7 Typical Characteristics
8. 7 Detailed Description
   1. 7.1 Overview
   2. 7.2 Functional Block Diagram
   3. 7.3 Feature Description
   4. 7.4 Device Functional Modes
9. 8 Application and Implementation
   1. 8.1 Application Information
   2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
   3. 8.3 Power Supply Recommendations
   4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
       1. 9.1.1 Related Documentation
    2. 9.2 サポート・リソース
    3. 9.3 Trademarks
    4. 9.4 静電気放電に関する注意事項
    5. 9.5 用語集
11. 10Mechanical, Packaging, and Orderable Information

TPD6E004 低容量、6 チャネル、±15kV ESD 保護アレイ、高速データ・インターフェイス用