SLPS730B
august 2021 – august 2023
JFE2140
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Typical Characteristics
7
Parameter Measurement Information
7.1
AC Measurement Configurations
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Precision Matching
8.3.2
Ultra-Low Noise
8.3.3
Low Gate Current
8.3.4
Input Protection
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.1.1
Input Protection Diodes
9.1.2
Cascode Configuration
9.1.3
Common-Source Amplifier
9.1.4
Composite Amplifiers
9.2
Typical Applications
9.2.1
Low-Noise, Low-Power, High-Input-Impedance Composite Amplifier
9.2.1.1
Design Requirements
9.2.1.2
Detailed Design Procedure
9.2.1.3
Application Curves
9.2.2
Differential Front-End Design
9.2.2.1
Application Curves
9.3
Power Supply Recommendations
9.4
Layout
9.4.1
Layout Guidelines
9.4.2
Layout Example
10
Device and Documentation Support
10.1
Device Support
10.1.1
Development Support
10.1.1.1
PSpice® for TI
10.1.1.2
TINA-TI™ Simulation Software (Free Download)
10.1.1.3
TI Reference Designs
10.1.1.4
Filter Design Tool
10.2
Documentation Support
10.2.1
Related Documentation
10.3
Receiving Notification of Documentation Updates
10.4
Support Resources
10.5
Trademarks
10.6
Electrostatic Discharge Caution
10.7
Glossary
11
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
D|8
MSOI002K
DSG|8
MPDS308C
Thermal pad, mechanical data (Package|Pins)
DSG|8
QFND141I
Orderable Information
slps730b_oa
slps730b_pm
Data Sheet
JFE2140 Ultra-Low Noise, Matched, Dual, Low-Gate Current, Discrete, Audio, N‑Channel JFET
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