SLVUC40
May 2021
TPS629210-Q1
Trademarks
1
Introduction
2
Performance Specification
3
EVM Configuration and Modification
3.1
Input and Output Capacitors
3.2
Configurable Enable Threshold Voltage
3.3
MODE/S-CONF Setting
3.4
Power Good
3.5
Power Good Pull Up Voltage
3.6
Feedforward Capacitor Option
3.7
Output Voltage Setting
3.8
Loop Response Measurement
4
EVM Test Set Up
4.1
Input and Output Connectors
4.2
Jumper Configuration
4.2.1
JP1 Enable
4.2.2
JP2 MODE/S-CONF
4.2.3
JP3 Power Good
4.2.4
JP4 PG Pull Up Voltage
5
Test Results
6
Board Layout
7
Schematic and Bill of Materials
7.1
Schematic
7.2
Bill of Materials
8
References
Trademarks
All trademarks are the property of their respective owners.
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