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98% Efficient, High Power Density Brushless Motor Drive Reference Design" />
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18-V/1-kW, 160-APEAK, >98% Efficient, High Power Density Brushless Motor Drive Reference Design
TIDUCL0
January 2017
CONTENTS
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18-V/1-kW, 160-APEAK, >98% Efficient, High Power Density Brushless Motor Drive Reference Design
1
Description
2
Resources
3
Features
4
Applications
5
Design Images
6
System Overview
6.1
System Description
6.2
Key System Specifications
6.3
Block Diagram
6.4
Highlighted Products
6.4.1
CSD88584Q5DC
6.4.2
DRV8323
6.4.3
MSP430F5132
6.4.4
TPS54061
6.4.5
LMT87
7
System Design Theory
7.1
Power Stage Design—Battery Power Input to the Board
7.2
Power Stage Design—Three-Phase Inverter
7.2.1
Design Considerations in Paralleling MOSFETs
7.2.1.1
Conduction Phase
7.2.1.2
Switching Phase
7.2.2
Selecting the Sense Resistor
7.3
Power Stage Design—DRV8323 Gate Driver
7.3.1
Gate Drive Features of DRV8323
7.3.2
Current Shunt Amplifier in DRV8323
7.3.3
Protection Features in DRV8323
7.4
Power Stage Design—18-V to 3.3-V DC-DC Converter
7.5
Power Stage Design —Microcontroller MSP430
7.6
Power Stage Design—Hall Sensor Interface
7.7
Temperature Sensing
7.8
Power Stage Design—External Interface Options and Indications
7.8.1
Speed Control of Motor
7.8.2
Direction of Rotation—Digital Input
7.8.3
LED Indications
7.8.4
Signal Interface Connector for External Monitoring and Control
8
Getting Started Hardware and Software
8.1
Hardware
8.1.1
Connector Configuration of TIDA-00774
8.1.2
Programming of MSP430
8.1.3
Procedure for Board Bring-up and Testing
8.2
Software
8.2.1
System Features
8.2.2
Customizing the Reference Code
8.2.2.1
PWM_PERIOD
8.2.2.2
MAX_DUTYCYCLE
8.2.2.3
MIN_DUTYCYCLE
8.2.2.4
ACCEL_RATE
8.2.2.5
Block_Rotor_Duration
8.2.3
Configuring the DRV8323 Registers (drv8323.c)
8.2.4
Initializing SPI Communication Between DRV8323 and MSP430 (drv8323.h)
8.2.5
Running Project in Code Composer Studio (CCS)
9
Testing and Results
9.1
Test Setup
9.2
Test Data
9.2.1
Functional Tests
9.2.1.1
3.3-V Power Supply Generated by Step-Down Converter
9.2.1.2
Gate Drive Voltage Generated by Gate Driver
9.2.1.3
Dead Time From DRV8323
9.2.1.4
MOSFET Switching Waveforms
9.2.1.5
VGS Skew of Parallel FETs During Switching
9.2.2
Load Test
9.2.2.1
Load Test Without Heat Sink
9.2.2.2
Load Test With Heat Sink
9.2.2.3
Load Test With Heat Sink and Airflow
9.2.3
Inverter Efficiency Test
9.2.4
Thermal Rise at Different Power Levels
9.2.5
Inverter Current Sensing by VDS Monitoring
9.2.6
Overcurrent and Short-Circuit Protection Test
9.2.6.1
Cycle-by-Cycle Stall Current Protection by DRV8323 VDS Sensing
9.2.6.2
Stall Current Latch Protection by DRV8323 VDS Sensing
9.2.7
Testing for Peak Current Capability
10
Design Files
10.1
Schematics
10.2
Bill of Materials
10.3
PCB Layout Recommendations
10.3.1
Layout Prints
10.4
Altium Project
10.5
Gerber Files
10.6
Assembly Drawings
11
Software Files
12
Related Documentation
12.1
Trademarks
13
Terminology
14
About the Author
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