SLUSDR7B
January 2020 – April 2021
TPS562207
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Adaptive On-Time Control and PWM Operation
7.3.2
Soft Start and Pre-Biased Soft Start
7.3.3
Current Protection
7.3.4
Undervoltage Lockout (UVLO) Protection
7.3.5
Thermal Shutdown
7.4
Device Functional Modes
7.4.1
Normal Operation
7.4.2
Standby Operation
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Output Voltage Resistors Selection
8.2.2.2
Output Filter Selection
8.2.2.3
Input Capacitor Selection
8.2.2.4
Bootstrap Capacitor Selection
8.2.3
Application Curves
9
Layout
9.1
Layout Guidelines
9.2
Layout Example
10
Device and Documentation Support
10.1
Receiving Notification of Documentation Updates
10.2
Support Resources
10.3
Trademarks
10.4
Electrostatic Discharge Caution
10.5
Glossary
11
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DRL|6
MPDS159H
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slusdr7b_oa
slusdr7b_pm
1
Features
2-A converter integrated 140-mΩ and 84-mΩ FETs
D-CAP2™
mode control with fast transient response
Input voltage range: 4.3 V to 17 V
Output voltage range: 0.804 V to 7 V
Forced continuous conduction mode
580-kHz switching frequency
Low shutdown current less than 3 µA
2% feedback voltage accuracy (25 °C)
Support pre-bias function
Cycle-by-cycle over current limit
Hiccup-mode over current protection
Non-latch UVP and TSD protections
Fixed soft start: 1.2 ms
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