SLVSFP4B
August 2020 – March 2021
TPS62912
,
TPS62913
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Smart Config (S-CONF)
7.3.2
Device Enable (EN/SYNC)
7.3.3
Device Synchronization (EN/SYNC)
7.3.4
Spread Spectrum Modulation
7.3.5
Output Discharge
7.3.6
Undervoltage Lockout (UVLO)
7.3.7
Power-Good Output
7.3.8
Noise Reduction and Soft-Start Capacitor (NR/SS)
7.3.9
Current Limit and Short Circuit Protection
7.3.10
Thermal Shutdown
7.4
Device Functional Modes
7.4.1
Fixed Frequency Pulse Width Modulation
7.4.2
Low Duty Cycle Operation
7.4.3
High Duty Cycle Operation (100% Duty Cycle)
7.4.4
Second Stage L-C Filter Compensation (Optional)
8
Application and Implementation
8.1
Application Information
8.2
Typical Applications
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Custom Design With WEBENCH® Tools
8.2.2.2
External Component Selection
8.2.2.2.1
Switching Frequency Selection
8.2.2.2.2
Inductor Selection for the First L-C Filter
8.2.2.2.3
Output Capacitor Selection
8.2.2.2.4
Ferrite Bead Selection for Second L-C Filter
8.2.2.2.5
Input Capacitor Selection
8.2.2.2.6
Setting the Output Voltage
8.2.2.2.7
NR/SS Capacitor Selection
8.2.3
Application Curves
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Device Support
11.1.1
Third-Party Products Disclaimer
11.1.2
Development Support
11.1.2.1
Custom Design With WEBENCH® Tools
11.2
Receiving Notification of Documentation Updates
11.3
Support Resources
11.4
Trademarks
11.5
Electrostatic Discharge Caution
11.6
Glossary
12
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RPU|10
MPQF554
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slvsfp4b_oa
slvsfp4b_pm
1
Features
Low output 1/f noise < 20 µV
RMS
(100 Hz to 100 kHz)
Low output voltage ripple < 10 µV
RMS
after ferrite bead
High PSRR of > 65 dB (up to 100 kHz)
2.2-MHz or 1-MHz fixed frequency peak current mode control
Synchronizable with external clock (optional)
Integrated loop compensation supports ferrite bead for second stage L-C filter with 30-dB attenuation (optional)
Spread spectrum modulation (optional)
3.0-V to 17-V input voltage range
0.8-V to 5.5-V output voltage range
57-mΩ/20-mΩ R
DSon
Output voltage accuracy of ±1%
Precise enable input allows
User-defined undervoltage lockout
Exact sequencing
Adjustable soft start
Power-good output
Output discharge (optional)
–40°C to 150°C junction temperature range
2.0-mm × 2.0-mm QFN with 0.5-mm pitch
Create a custom design using the TPS6291x with the
WEBENCH®
Power Designer
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