SLLSF48C
March 2018 – September 2019
TUSB1064
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Device Images
Simplified Schematics
TUSB1064 Use-Case Example
4
Revision History
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
ELECTRICAL CHARACTERISTICS
6.6
Switching Characteristics
6.7
Timing Requirements
6.8
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
USB 3.1
8.3.2
DisplayPort
8.3.3
4-level Inputs
8.3.4
Receiver Linear Equalization
8.4
Device Functional Modes
8.4.1
Device Configuration in GPIO Mode
8.4.2
Device Configuration In I2C Mode
8.4.3
DisplayPort Mode
8.4.4
Linear EQ Configuration
8.4.5
USB3.1 Modes
8.4.6
Operation Timing – Power Up
8.5
Programming
8.6
Register Maps
8.6.1
General Register (address = 0x0A) [reset = 00000001]
Table 11.
General Registers
8.6.2
DisplayPort Control/Status Registers (address = 0x10) [reset = 00000000]
Table 12.
DisplayPort Control/Status Registers (0x10)
8.6.3
DisplayPort Control/Status Registers (address = 0x11) [reset = 00000000]
Table 13.
DisplayPort Control/Status Registers (0x11)
8.6.4
DisplayPort Control/Status Registers (address = 0x12) [reset = 00000000]
Table 14.
DisplayPort Control/Status Registers (0x12)
8.6.5
DisplayPort Control/Status Registers (address = 0x13) [reset = 00000000]
Table 15.
DisplayPort Control/Status Registers (0x13)
8.6.6
USB3.1 Control/Status Registers (address = 0x20) [reset = 00000000]
Table 16.
USB3.1 Control/Status Registers (0x20)
8.6.7
USB3.1 Control/Status Registers (address = 0x21) [reset = 00000000]
Table 17.
USB3.1 Control/Status Registers (0x21)
8.6.8
USB3.1 Control/Status Registers (address = 0x22) [reset = 00000000]
Table 18.
USB3.1 Control/Status Registers (0x22)
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Support for DisplayPort UFP_D Pin Assignment E
9.2.4
PCB Insertion Loss Curves
9.3
System Examples
9.3.1
USB 3.1 Only
9.3.2
USB 3.1 and 2 Lanes of DisplayPort
9.3.3
DisplayPort Only
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Receiving Notification of Documentation Updates
12.2
Community Resources
12.3
Trademarks
12.4
Electrostatic Discharge Caution
12.5
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RNQ|40
MPQF457A
Thermal pad, mechanical data (Package|Pins)
Orderable Information
sllsf48c_oa
sllsf48c_pm
1
Features
USB Type-C™ crosspoint switch supporting
USB 3.1 Gen 2 + 2 DP 1.4 lanes
4 DP 1.4 lanes
USB 3.1 Gen 2 up to 10 Gbps
DisplayPort 1.4 up to 8.1 Gbps (HBR3)
VESA DisplayPort™ alt mode UFP_D redriving crosspoint switch supporting c, d, and e pin assignments
Ultra-low-power architecture
Linear redriver with up to 12 dB equalization
Transparent to DisplayPort link training
Automatic LFPS de-emphasis control to meet USB 3.1 certification requirements
Configuration through GPIO or I
2
C
Hot-plug capable
Industrial temperature range: –40ºC to 85ºC (TUSB1064I)
Commercial temperature range: 0ºC to 70ºC (TUSB1064)
4 mm x 6 mm, 0.4 mm Pitch WQFN package
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