Loading [MathJax]/jax/output/SVG/fonts/TeX/fontdata.js
Menu
Product
Email
PDF
Order now
UCC21222-Q1 Automotive 4A, 6A, 3kVRMS Isolated Dual-Channel Gate Driver with Dead Time
SLUSDA5B
February 2018 – April 2024
UCC21222-Q1
PRODUCTION DATA
CONTENTS
SEARCH
UCC21222-Q1 Automotive 4A, 6A, 3kVRMS Isolated Dual-Channel Gate Driver with Dead Time
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings (Automotive)
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Power Ratings
5.6
Insulation Specifications
5.7
Safety Limiting Values
5.8
Electrical Characteristics
5.9
Switching Characteristics
5.10
Insulation Characteristics Curves
5.11
Typical Characteristics
6
Parameter Measurement Information
6.1
Minimum Pulses
6.2
Propagation Delay and Pulse Width Distortion
6.3
Rising and Falling Time
6.4
Input and Disable Response Time
6.5
Programmable Dead Time
6.6
Power-Up UVLO Delay to OUTPUT
6.7
CMTI Testing
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
VDD, VCCI, and Undervoltage Lock Out (UVLO)
7.3.2
Input and Output Logic Table
7.3.3
Input Stage
7.3.4
Output Stage
7.3.5
Diode Structure in the UCC21222-Q1
7.4
Device Functional Modes
7.4.1
Disable Pin
7.4.2
Programmable Dead Time (DT) Pin
7.4.2.1
DT Pin Tied to VCCI or DT Pin Left Open
7.4.2.2
Connecting a Programming Resistor between DT and GND Pins
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Custom Design With WEBENCH® Tools
8.2.2.2
Designing INA/INB Input Filter
8.2.2.3
Select Dead Time Resistor and Capacitor
8.2.2.4
Select External Bootstrap Diode and its Series Resistor
8.2.2.5
Gate Driver Output Resistor
8.2.2.6
Estimating Gate Driver Power Loss
8.2.2.7
Estimating Junction Temperature
8.2.2.8
Selecting VCCI, VDDA/B Capacitor
8.2.2.8.1
Selecting a VCCI Capacitor
8.2.2.8.2
Selecting a VDDA (Bootstrap) Capacitor
8.2.2.8.3
Select a VDDB Capacitor
8.2.2.9
Application Circuits with Output Stage Negative Bias
8.2.3
Application Curves
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.1.1
Component Placement Considerations
10.1.2
Grounding Considerations
10.1.3
High-Voltage Considerations
10.1.4
Thermal Considerations
10.2
Layout Example
11
Device and Documentation Support
11.1
Device Support
11.1.1
Third-Party Products Disclaimer
11.1.2
Development Support
11.1.2.1
Custom Design With WEBENCH® Tools
11.2
Documentation Support
11.2.1
Related Documentation
11.3
Receiving Notification of Documentation Updates
11.4
Support Resources
11.5
Trademarks
11.6
Electrostatic Discharge Caution
11.7
Glossary
12
Revision History
13
Mechanical, Packaging, and Orderable Information
IMPORTANT NOTICE
Package Options
Mechanical Data (Package|Pins)
D|16
MPDS178G
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slusda5b_oa
slusda5b_pm
search
No matches found.
Full reading width
Full reading width
Comfortable reading width
Expanded reading width
Card for each section
Card with all content
千亿体育app官网登录(中国)官方网站IOS/安卓通用版/手机APP
|
米乐app下载官网(中国)|ios|Android/通用版APP最新版
|
米乐|米乐·M6(中国大陆)官方网站
|
千亿体育登陆地址
|
华体会体育(中国)HTH·官方网站
|
千赢qy国际_全站最新版千赢qy国际V6.2.14安卓/IOS下载
|
18新利网v1.2.5|中国官方网站
|
bob电竞真人(中国官网)安卓/ios苹果/电脑版【1.97.95版下载】
|
千亿体育app官方下载(中国)官方网站IOS/安卓/手机APP下载安装
|