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Inverting buffers & drivers

CD74HCU04

ACTIVE

6-ch, 4.5-V to 5.5-V inverters

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Data sheet

CD74HCU04

ACTIVE
Data sheet Order now

Product details

Technology family HC Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Number of channels 6 IOL (max) (mA) 5.2 IOH (max) (mA) -5.2 Supply current (max) (µA) 40 Input type Standard CMOS Output type Push-Pull Features Balanced outputs, High speed (tpd 10-50ns), Input clamp diode, Unbuffered Rating Catalog Operating temperature range (°C) -55 to 125
Technology family HC Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Number of channels 6 IOL (max) (mA) 5.2 IOH (max) (mA) -5.2 Supply current (max) (µA) 40 Input type Standard CMOS Output type Push-Pull Features Balanced outputs, High speed (tpd 10-50ns), Input clamp diode, Unbuffered Rating Catalog Operating temperature range (°C) -55 to 125
PDIP (N) 14 181.42 mm² 19.3 x 9.4 SOIC (D) 14 51.9 mm² 8.65 x 6 TSSOP (PW) 14 32 mm² 5 x 6.4
  • Typical Propagation Delay: 6ns at VCC = 5V, CL = 15pF, TA = 25°C, Fastest Part in QMOS Line
  • Wide Operating Temperature Range . . . –55°C to 125°C
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HCU Types
    • 2V to 6V Operation
    • High Noise Immunity: NIL = 20%, NIH = 30% of VCC at VCC = 5V
    • CMOS Input Compatibility, Il ≤ 1µA at VOL , VOH
  • Typical Propagation Delay: 6ns at VCC = 5V, CL = 15pF, TA = 25°C, Fastest Part in QMOS Line
  • Wide Operating Temperature Range . . . –55°C to 125°C
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HCU Types
    • 2V to 6V Operation
    • High Noise Immunity: NIL = 20%, NIH = 30% of VCC at VCC = 5V
    • CMOS Input Compatibility, Il ≤ 1µA at VOL , VOH

The CD74HCU04 unbuffered hex inverter utilizes silicon-gate CMOS technology to achieve operation speeds similar to LSTTL gates with the low power consumption of standard CMOS integrated circuits. These devices are especially useful in crystal oscillator and analog applications.

The CD74HCU04 unbuffered hex inverter utilizes silicon-gate CMOS technology to achieve operation speeds similar to LSTTL gates with the low power consumption of standard CMOS integrated circuits. These devices are especially useful in crystal oscillator and analog applications.
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Technical documentation

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Type Title Date
* Data sheet CD74HCU04 datasheet (Rev. D) 18 May 2004
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
User guide Signal Switch Data Book (Rev. A) 14 Nov 2003
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
Application note Designing With Logic (Rev. C) 01 Jun 1997
Application note Input and Output Characteristics of Digital Integrated Circuits 01 Oct 1996
Application note Live Insertion 01 Oct 1996
Application note SN54/74HCT CMOS Logic Family Applications and Restrictions 01 May 1996
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 01 Apr 1996

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
Not available on TI.com
Simulation model

CD74HCU04 Behavioral SPICE Model

SCHM115.ZIP (7 KB) - PSpice Model
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Package Pins CAD symbols, footprints & 3D models
PDIP (N) 14 Ultra Librarian
SOIC (D) 14 Ultra Librarian
TSSOP (PW) 14 Ultra Librarian
TI's Standard Terms and Conditions for Evaluation Items apply.

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