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CDCE913-Q1

ACTIVE

Automotive catalog programmable 1-PLL VCXO clock synthesizer with 2.5-V or 3.3-V LVCMOS outputs

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Data sheet

CDCE913-Q1

ACTIVE
Data sheet Order now

Product details

Function Clock generator, Spread-spectrum clock generator Number of outputs 3 Output frequency (max) (MHz) 230 Core supply voltage (V) 1.8 Output supply voltage (V) 2.5, 3.3 Input type LVCMOS, XTAL Output type LVCMOS Operating temperature range (°C) -40 to 125 TI functional safety category Functional Safety-Capable Features I2C, Integrated EEPROM, Pin programmable, Spread-spectrum clocking (SSC) Rating Automotive
Function Clock generator, Spread-spectrum clock generator Number of outputs 3 Output frequency (max) (MHz) 230 Core supply voltage (V) 1.8 Output supply voltage (V) 2.5, 3.3 Input type LVCMOS, XTAL Output type LVCMOS Operating temperature range (°C) -40 to 125 TI functional safety category Functional Safety-Capable Features I2C, Integrated EEPROM, Pin programmable, Spread-spectrum clocking (SSC) Rating Automotive
TSSOP (PW) 14 32 mm² 5 x 6.4
  • Qualified for automotive applications
  • AEC-Q100 qualified with the following results:
    • Device temperature grades
      • Grade 1 For CDCE913-Q1: –40°C to +125°C ambient operating temperature
      • Grade 3 For CDCEL913-Q1: –40°C to +85°C ambient operating temperature
    • Device HBM ESD classification level H2
    • Device CDM ESD classification level C6
  • Functional Safety-Capable
  • In-system programmability and EEPROM
    • Serial programmable volatile register
    • Nonvolatile EEPROM to store customer settings
  • Flexible input clocking concept
    • External crystal: 8MHz to 32MHz
    • On-chip VCXO: pull range ±150ppm
    • Single-ended LVCMOS up to 160MHz
  • Free selectable output frequency up to 230MHz
  • Low-noise PLL core
    • PLL loop filter components integrated
    • Low period jitter (typical 50ps)
  • Separate output supply pins:
    • CDCE913-Q1: 3.3V and 2.5V
    • CDCEL913-Q1: 1.8V
  • Flexible clock driver
    • Three user-definable control inputs [S0, S1, S2], for example, SSC selection, frequency switching, output enable, or power down
    • Generates highly accurate clocks for video, audio, USB, IEEE1394, RFID, Bluetooth, WLAN, Ethernet, and GPS
    • Generates common clock frequencies used with TI- DaVinci™, OMAP™, DSPs
    • Programmable SSC modulation
    • Enables 0-PPM clock generation
  • 1.8V device power supply
  • Packaged in TSSOP
  • Development and programming kit for easy PLL design and programming (TI Pro-Clock™)
  • Qualified for automotive applications
  • AEC-Q100 qualified with the following results:
    • Device temperature grades
      • Grade 1 For CDCE913-Q1: –40°C to +125°C ambient operating temperature
      • Grade 3 For CDCEL913-Q1: –40°C to +85°C ambient operating temperature
    • Device HBM ESD classification level H2
    • Device CDM ESD classification level C6
  • Functional Safety-Capable
  • In-system programmability and EEPROM
    • Serial programmable volatile register
    • Nonvolatile EEPROM to store customer settings
  • Flexible input clocking concept
    • External crystal: 8MHz to 32MHz
    • On-chip VCXO: pull range ±150ppm
    • Single-ended LVCMOS up to 160MHz
  • Free selectable output frequency up to 230MHz
  • Low-noise PLL core
    • PLL loop filter components integrated
    • Low period jitter (typical 50ps)
  • Separate output supply pins:
    • CDCE913-Q1: 3.3V and 2.5V
    • CDCEL913-Q1: 1.8V
  • Flexible clock driver
    • Three user-definable control inputs [S0, S1, S2], for example, SSC selection, frequency switching, output enable, or power down
    • Generates highly accurate clocks for video, audio, USB, IEEE1394, RFID, Bluetooth, WLAN, Ethernet, and GPS
    • Generates common clock frequencies used with TI- DaVinci™, OMAP™, DSPs
    • Programmable SSC modulation
    • Enables 0-PPM clock generation
  • 1.8V device power supply
  • Packaged in TSSOP
  • Development and programming kit for easy PLL design and programming (TI Pro-Clock™)

The CDCE913-Q1 and CDCEL913-Q1 devices are modular, phase-locked loop (PLL)-based programmable clock synthesizers. These devices provide flexible and programmable options, such as output clocks, input signals, and control pins, so that the user can configure the CDCE913-Q1 and CDCEL913-Q1 for their own specifications.

The CDCE913-Q1 and CDCEL913-Q1 generate up to three output clocks from a single input frequency to enable both board space and cost savings. Additionally, with multiple outputs, the clock generator can replace multiple crystals with one clock generator. This makes the device well-suited for head unit and telematics applications in infotainment and camera systems in ADAS, as these platforms are evolving into smaller and more cost effective systems.

Also, each output can be programmed in-system for any clock frequency up to 230MHz through the integrated, configurable PLL. The PLL also supports spread-spectrum clocking (SSC) with programmable down and center spread. This provides better electromagnetic interference (EMI) performance to enable customers to pass industry standards such as CISPR-25.

Customization of frequency programming and SSC are accessed using three, user-defined control pins. This eliminates the need to use an additional interface to control the clock. Specific power-up and power-down sequences can also be defined to the user’s needs.

The CDCE913-Q1 and CDCEL913-Q1 devices are modular, phase-locked loop (PLL)-based programmable clock synthesizers. These devices provide flexible and programmable options, such as output clocks, input signals, and control pins, so that the user can configure the CDCE913-Q1 and CDCEL913-Q1 for their own specifications.

The CDCE913-Q1 and CDCEL913-Q1 generate up to three output clocks from a single input frequency to enable both board space and cost savings. Additionally, with multiple outputs, the clock generator can replace multiple crystals with one clock generator. This makes the device well-suited for head unit and telematics applications in infotainment and camera systems in ADAS, as these platforms are evolving into smaller and more cost effective systems.

Also, each output can be programmed in-system for any clock frequency up to 230MHz through the integrated, configurable PLL. The PLL also supports spread-spectrum clocking (SSC) with programmable down and center spread. This provides better electromagnetic interference (EMI) performance to enable customers to pass industry standards such as CISPR-25.

Customization of frequency programming and SSC are accessed using three, user-defined control pins. This eliminates the need to use an additional interface to control the clock. Specific power-up and power-down sequences can also be defined to the user’s needs.
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Technical documentation

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Type Title Date
* Data sheet CDCE913-Q1 and CDCEL913-Q1 Programmable 1-PLL VCXO Clock Synthesizer s With 1.8V, 2.5V, and 3.3V Outputs datasheet (Rev. E) PDF | HTML 22 Aug 2024
Functional safety information CDCE913-Q1 Functional Safety FIT Rate, FMD and Pin FMA PDF | HTML 06 Dec 2021
Application note Crystal or Crystal Oscillator Replacement with Silicon Devices 18 Jun 2014
Application note VCXO Application Guideline for CDCE(L)9xx Family (Rev. A) 23 Apr 2012
User guide CDCE(L)9XX & CDCEx06 Programming Evaluation Module Manual (Rev. A) 22 Nov 2010
User guide CDCE(L)9xx Performance Evaluation Module (Rev. A) 07 Jul 2010
Application note General I2C / EEPROM usage for the CDCE(L)9xx family 26 Jan 2010
Application note Troubleshooting I2C Bus Protocol 19 Oct 2009
Application note Usage of I2C for CDCE(L)949, CDCE(L)937, CDCE(L)925, CDCE(L)913 23 Sep 2009
Application note Generating Low Phase-Noise Clocks for Audio Data Converters from Low Frequency 31 Mar 2008
Application note Practical consideration on choosing a crystal for CDCE(L)9xx family 24 Mar 2008

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

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User guide: PDF
Not available on TI.com
Evaluation board

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The clock generator CDCE(L)949 family has integrated EEPROM that allows the default frequency settings to be saved upon start up. CDCEL9XXPROGEVM is a programming board that allows a fast programming of prototyping samples or small production quantities. It applies to all 8 devices in the family: (...)

User guide: PDF
Not available on TI.com
Simulation model

CDCE913 IBIS Model

SCAM056.ZIP (41 KB) - IBIS Model
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Simulation tool

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PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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Reference designs

TIDA-01425 — Automotive Stand-Alone Gateway Reference Design with Ethernet and CAN

The TIDA-01425 is a subsystem reference design for automotive gateways focused on increasing bandwidth and processing power in gateway applications. The design implements Ethernet physical layer transceivers (PHYs) for increased bandwidth along with an automotive processor for greater processing (...)
Design guide: PDF
Schematic: PDF
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TSSOP (PW) 14 Ultra Librarian
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