The \x92FCT827T devices are 10-bit bus drivers that provide high-performance bus-interface buffering for wide data/address paths or buses carrying parity. The 10-bit buffers have NANDed output enables for maximum control flexibility. The \x92FCT827T devices are designed for high-capacitance-load drive capability, while providing low-capacitance bus loading at both inputs and outputs. All outputs are designed for low-capacitance bus loading in the high-impedance state.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
| Type | Title | Date | ||
|---|---|---|---|---|
| * | Data sheet | 10-Bit Buffers With 3-State Outputs datasheet (Rev. A) | 01 Oct 2001 | |
| Selection guide | Logic Guide (Rev. AB) | 12 Jun 2017 | ||
| Application note | Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) | 02 Dec 2015 | ||
| User guide | LOGIC Pocket Data Book (Rev. B) | 16 Jan 2007 | ||
| Application note | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | 08 Jul 2004 | ||
| Application note | Selecting the Right Level Translation Solution (Rev. A) | 22 Jun 2004 | ||
| User guide | CYFCT Parameter Measurement Information | 02 Apr 2001 | ||
| Selection guide | Advanced Bus Interface Logic Selection Guide | 09 Jan 2001 |
For additional terms or required resources, click any title below to view the detail page where available.
The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| SOIC (DW) | 24 | Ultra Librarian |
| SSOP (DBQ) | 24 | Ultra Librarian |
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