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Linear & low-dropout (LDO) regulators

LP2951

ACTIVE

100-mA, 30-V, low-dropout voltage regulator with power good & enable

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Data sheet

LP2951

ACTIVE
Data sheet Order now

Product details

Output options Adjustable Output, Fixed Output Iout (max) (A) 0.1 Vin (max) (V) 30 Vin (min) (V) 2 Vout (max) (V) 29 Vout (min) (V) 1.2 Fixed output options (V) 3, 3.3, 5 Noise (µVrms) 160 Iq (typ) (mA) 0.075 Thermal resistance θJA (°C/W) 52, 97 Rating Catalog Load capacitance (min) (µF) 1 Regulated outputs (#) 1 Features Enable, Power good Accuracy (%) 3 PSRR at 100 KHz (dB) 57 Dropout voltage (Vdo) (typ) (mV) 380 Operating temperature range (°C) -40 to 125
Output options Adjustable Output, Fixed Output Iout (max) (A) 0.1 Vin (max) (V) 30 Vin (min) (V) 2 Vout (max) (V) 29 Vout (min) (V) 1.2 Fixed output options (V) 3, 3.3, 5 Noise (µVrms) 160 Iq (typ) (mA) 0.075 Thermal resistance θJA (°C/W) 52, 97 Rating Catalog Load capacitance (min) (µF) 1 Regulated outputs (#) 1 Features Enable, Power good Accuracy (%) 3 PSRR at 100 KHz (dB) 57 Dropout voltage (Vdo) (typ) (mV) 380 Operating temperature range (°C) -40 to 125
SOIC (D) 8 29.4 mm² 4.9 x 6 WSON (DRG) 8 9 mm² 3 x 3
  • Wide input voltage range
    • VIN range (new chip): 2V to 30V
  • Wide output voltage range VOUT
    • Fixed option: 5.0V, 3.3V, 3V (Legacy Chip)
    • Adjustable option: 1.2V to 29V
  • VOUT accuracy:
    • ±2% over temperature for legacy chip
    • ±0.7% over temperature for new chip
    • ±1% over line, load, and temperature for new chip
  • Output current: Up to 100mA
  • Low IQ (New Chip): 50µA (Typical)
  • Low dropout: 340mV (Typical) at 100mA for new chip
  • Output current limiting and thermal shutdown
  • Open-Drain Error output
  • Stable over a wide range of ceramic output capacitor values
    • COUT range: 1µF to 100µF (New Chip)
    • ESR range: 0 to 2Ω (New Chip)
  • Operating junction temperature: –40°C to 125°C
  • Package option:
    • LP (3-pin TO-92)
    • D (8-pin SOIC)
    • DRG (8-pin WSON)
  • Wide input voltage range
    • VIN range (new chip): 2V to 30V
  • Wide output voltage range VOUT
    • Fixed option: 5.0V, 3.3V, 3V (Legacy Chip)
    • Adjustable option: 1.2V to 29V
  • VOUT accuracy:
    • ±2% over temperature for legacy chip
    • ±0.7% over temperature for new chip
    • ±1% over line, load, and temperature for new chip
  • Output current: Up to 100mA
  • Low IQ (New Chip): 50µA (Typical)
  • Low dropout: 340mV (Typical) at 100mA for new chip
  • Output current limiting and thermal shutdown
  • Open-Drain Error output
  • Stable over a wide range of ceramic output capacitor values
    • COUT range: 1µF to 100µF (New Chip)
    • ESR range: 0 to 2Ω (New Chip)
  • Operating junction temperature: –40°C to 125°C
  • Package option:
    • LP (3-pin TO-92)
    • D (8-pin SOIC)
    • DRG (8-pin WSON)

The LP2951 is a wide input low-dropout regulator (LDO) supporting an input voltage range from 2V to 30V and up to 100mA of load current. LP2951 is able to output either a fixed or adjustable output from the same device. By tying the OUTPUT and SENSE pins together, and the FEEDBACK and VTAP pins together, the LP2950/LP2951 can give 5V or 3.3V fixed output voltages. Alternatively, by leaving the SENSE and VTAP pins open and connecting FEEDBACK to an external resistor divider, the output can be set to any value between 1.2V to 29V.

The LP2951 has a ERROR output that monitors the voltage at the feedback pin to indicate the status of the output voltage. The SHUTDOWN input and ERROR output can be used for sequencing multiple power supplies in the system.

The LP2951 is available in a 3-pin 4.83mm x 4.83mm TO-92(LP), an 8-pin 4.9mm x 6.0mm SOIC(D), and 8-pin 3mm x 3mm SON(DRG) package.

The LP2951 is a wide input low-dropout regulator (LDO) supporting an input voltage range from 2V to 30V and up to 100mA of load current. LP2951 is able to output either a fixed or adjustable output from the same device. By tying the OUTPUT and SENSE pins together, and the FEEDBACK and VTAP pins together, the LP2950/LP2951 can give 5V or 3.3V fixed output voltages. Alternatively, by leaving the SENSE and VTAP pins open and connecting FEEDBACK to an external resistor divider, the output can be set to any value between 1.2V to 29V.

The LP2951 has a ERROR output that monitors the voltage at the feedback pin to indicate the status of the output voltage. The SHUTDOWN input and ERROR output can be used for sequencing multiple power supplies in the system.

The LP2951 is available in a 3-pin 4.83mm x 4.83mm TO-92(LP), an 8-pin 4.9mm x 6.0mm SOIC(D), and 8-pin 3mm x 3mm SON(DRG) package.

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Technical documentation

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Type Title Date
* Data sheet LP295x Adjustable Micropower Voltage Regulators With Shutdown datasheet (Rev. J) PDF | HTML 05 Aug 2024
Application note L1 and L2 EV Charger Electric Vehicle Service Equipment Design Considerations (Rev. B) 09 Jun 2021
Application note LDO Noise Demystified (Rev. B) PDF | HTML 18 Aug 2020
Application note ESR, Stability, and the LDO Regulator (Rev. A) 07 Jan 2020
Application note A Topical Index of TI LDO Application Notes (Rev. F) 27 Jun 2019
Application note Fundamental Theory of PMOS LDO Voltage Regulators (Rev. A) 17 Aug 2018
EVM User's guide LP2951 EVM User's Guide (Rev. A) 05 Jan 2018
Application note LDO PSRR Measurement Simplified (Rev. A) PDF | HTML 09 Aug 2017
Technical article How to use an LDO as a load switch PDF | HTML 01 Feb 2016
Technical article Two ways LDOs save power in the IoT PDF | HTML 17 Aug 2015
Technical article How to use an LDO to protect a power source PDF | HTML 25 Jul 2015
Application note A Topical Index of TI Supply Voltage Supervisor (SVS) Application Notes 15 Jun 2015
Analog Design Journal Techniques for accurate PSRR measurements 28 Oct 2013
Application note AN-1028 Maximum Power Enhancement Techniques for Power Packages (Rev. B) 06 May 2013
Application note AN-1482 LDO Regulator Stability Using Ceramic Output Capacitors (Rev. A) 25 Apr 2013
Application note AN-1815 LDOs Ease the Stress of Start-Up (Rev. A) 24 Apr 2013
Application note AN-1061 Power Conversion in Line-Powered Equipment (Rev. B) 23 Apr 2013
Application note AN-1950 Silently Powering Low Noise Applications (Rev. A) 22 Apr 2013
Application note LDO Performance Near Dropout 08 Oct 2010
Application note 3.6V – 5.5V Input, LDO Reference Design for MSP430 (Rev. A) 14 Jun 2010
Application note 3.6V – 5.5V Input, LDO with Dual-Level Output Reference Design for MSP430 (Rev. A) 14 Jun 2010
Application note Packaging Limits Range of Linear Regulators 08 May 2010
Application note Simple Power Solution Using LDOs for the DM365 (Rev. A) 11 Sep 2009
Application note Digital Designer's Guide to Linear Voltage Regulators & Thermal Mgmt (LDO) (Rev. A) 04 Jun 2008
Application note Low-Voltage Current Loop Transmitter 02 Aug 2007
Application note Battery Charging 21 Mar 2007
Application note Linear and Switching Voltage Regulator Fundamental Part 1 21 Mar 2007
Application note Ceramic Capacitors Replace Tantalum Capacitors in LDOs (Rev. A) 13 Oct 2006
Application note Understanding LDO Dropout 09 May 2005
White paper Versatility of the LM5030 PWM Push-Pull Controller 01 Dec 2003
Application note Extending the Input Voltage Range of an LDO Regulator 16 Aug 2002
Application note Understanding the Terms and Definitions of LDO Voltage Regulators 21 Oct 1999
Application note Technical Review of Low Dropout Voltage Regulator Operation And Performance 30 Aug 1999
Application brief Low Power 150-mA LDO Linear Regulators. Extended Output Voltage Adjustment Range 11 Jun 1999

Design & development

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Evaluation board

LP2951EVM — LP2951 Fixed/Adjustable Micropower Low-Dropout (LDO) Regulator Evaluation Module

The LP2951 devices are bipolar low-dropout (LDO) voltage regulators that can accommodate a wide input supply-voltage range of up to 30 V with an output load up to 100 mA. The LP2951EVM allows for flexibility in design, allowing the user to add or remove input and output capacitors, as well as (...)
User guide: PDF
Not available on TI.com
Simulation model

LP2951 PSpice Transient Model (Rev. A)

SNVM037A.ZIP (23 KB) - PSpice Model
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Simulation model

LP2951 Unencrypted PSpice Transient Model

SNVMAO3.ZIP (1 KB) - PSpice Model
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Package Pins CAD symbols, footprints & 3D models
SOIC (D) 8 Ultra Librarian
WSON (DRG) 8 Ultra Librarian
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