LP2985

ACTIVE

150-mA, 16-V, low-dropout voltage regulator with enable

Product details

Output options Fixed Output Iout (max) (A) 0.15 Vin (max) (V) 16 Vin (min) (V) 2.2 Vout (max) (V) 10 Vout (min) (V) 1.8 Fixed output options (V) 1.25, 1.5, 1.8, 2.5, 2.8, 2.85, 2.9, 3, 3.1, 3.3, 5, 10 Noise (µVrms) 30 Iq (typ) (mA) 0.065 Thermal resistance θJA (°C/W) 205.4, 206 Rating Catalog Load capacitance (min) (µF) 2.2 Regulated outputs (#) 1 Features Enable Accuracy (%) 5 PSRR at 100 KHz (dB) 40 Dropout voltage (Vdo) (typ) (mV) 280 Operating temperature range (°C) -40 to 125
Output options Fixed Output Iout (max) (A) 0.15 Vin (max) (V) 16 Vin (min) (V) 2.2 Vout (max) (V) 10 Vout (min) (V) 1.8 Fixed output options (V) 1.25, 1.5, 1.8, 2.5, 2.8, 2.85, 2.9, 3, 3.1, 3.3, 5, 10 Noise (µVrms) 30 Iq (typ) (mA) 0.065 Thermal resistance θJA (°C/W) 205.4, 206 Rating Catalog Load capacitance (min) (µF) 2.2 Regulated outputs (#) 1 Features Enable Accuracy (%) 5 PSRR at 100 KHz (dB) 40 Dropout voltage (Vdo) (typ) (mV) 280 Operating temperature range (°C) -40 to 125
SOT-23 (DBV) 5 8.12 mm² 2.9 x 2.8
  • V IN range (new chip): 2.5 V to 16 V
  • V OUT range (new chip):
    • 1.2 V to 5.0 V (fixed, 100-mV steps)
  • V OUT accuracy:
    • ±1% for A-grade legacy chip
    • ±1.5% for standard-grade legacy chip
    • ±0.5% for new chip only
  • ±1% output accuracy over load, and temperature for new chip
  • Output current: Up to 150 mA
  • Low I Q (new chip): 71 µA at I LOAD = 0 mA
  • Low I Q (new chip): 750 µA at I LOAD = 150 mA
  • Shutdown current:
    • 0.01 µA (typ) for legacy chip
    • 1.12 µA (typ) for new chip
  • Low noise: 30 µV RMS with 10-nF bypass capacitor
  • Output current limiting and thermal protection
  • Stable with 2.2-µF ceramic capacitors
  • High PSRR: 70 dB at 1 kHz, 40 dB at 1 MHz
  • Operating junction temperature: –40°C to +125°C
  • Package: 5-pin SOT-23 (DBV)
  • V IN range (new chip): 2.5 V to 16 V
  • V OUT range (new chip):
    • 1.2 V to 5.0 V (fixed, 100-mV steps)
  • V OUT accuracy:
    • ±1% for A-grade legacy chip
    • ±1.5% for standard-grade legacy chip
    • ±0.5% for new chip only
  • ±1% output accuracy over load, and temperature for new chip
  • Output current: Up to 150 mA
  • Low I Q (new chip): 71 µA at I LOAD = 0 mA
  • Low I Q (new chip): 750 µA at I LOAD = 150 mA
  • Shutdown current:
    • 0.01 µA (typ) for legacy chip
    • 1.12 µA (typ) for new chip
  • Low noise: 30 µV RMS with 10-nF bypass capacitor
  • Output current limiting and thermal protection
  • Stable with 2.2-µF ceramic capacitors
  • High PSRR: 70 dB at 1 kHz, 40 dB at 1 MHz
  • Operating junction temperature: –40°C to +125°C
  • Package: 5-pin SOT-23 (DBV)

The LP2985 is a fixed-output, wide-input, low-noise, low-dropout voltage regulator supporting an input voltage range from 2.5 V to 16 V and up to 150 mA of load current. The LP2985 supports an output range of 1.2 V to 5.0 V (for new chip).

Additionally, the LP2985 (new chip) has a 1% output accuracy across load, and temperature that can meet the needs of low-voltage microcontrollers (MCUs) and processors.

Low output noise of 30 µV RMS (with 10-nF bypass capacitors) and wide bandwidth PSRR performance of greater than 70 dB at 1 kHz and 40 dB at 1 MHz help attenuate the switching frequency of an upstream DC/DC converter and minimize post regulator filtering.

The internal soft-start time and current limit protection reduce inrush current during start up, thus minimizing input capacitance. Standard protection features, such as overcurrent and overtemperature protection, are included.

The LP2985 is available in a 5-pin 2.9-mm × 1.6-mm SOT-23 (DBV) package.

The LP2985 is a fixed-output, wide-input, low-noise, low-dropout voltage regulator supporting an input voltage range from 2.5 V to 16 V and up to 150 mA of load current. The LP2985 supports an output range of 1.2 V to 5.0 V (for new chip).

Additionally, the LP2985 (new chip) has a 1% output accuracy across load, and temperature that can meet the needs of low-voltage microcontrollers (MCUs) and processors.

Low output noise of 30 µV RMS (with 10-nF bypass capacitors) and wide bandwidth PSRR performance of greater than 70 dB at 1 kHz and 40 dB at 1 MHz help attenuate the switching frequency of an upstream DC/DC converter and minimize post regulator filtering.

The internal soft-start time and current limit protection reduce inrush current during start up, thus minimizing input capacitance. Standard protection features, such as overcurrent and overtemperature protection, are included.

The LP2985 is available in a 5-pin 2.9-mm × 1.6-mm SOT-23 (DBV) package.

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Technical documentation

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Type Title Date
* Data sheet LP2985 150-mA, Low-Noise, Low-Dropout Regulator With Shutdown datasheet (Rev. R) PDF | HTML 10 Jul 2023
Application note LDO Noise Demystified (Rev. B) PDF | HTML 18 Aug 2020
Application brief 16-Bit 8-Channel PLC Analog Input Module with High Voltage (±150 V) Common Mode 27 Apr 2020
Application note ESR, Stability, and the LDO Regulator (Rev. A) 07 Jan 2020
Application note A Topical Index of TI LDO Application Notes (Rev. F) 27 Jun 2019
Application note Fundamental Theory of PMOS LDO Voltage Regulators (Rev. A) 17 Aug 2018
Application note LDO PSRR Measurement Simplified (Rev. A) PDF | HTML 09 Aug 2017
Application note A Topical Index of TI Supply Voltage Supervisor (SVS) Application Notes 15 Jun 2015
Application note Linear power for automated industrial systems 09 Jan 2015
Analog Design Journal Techniques for accurate PSRR measurements 28 Oct 2013
Application note AN-1028 Maximum Power Enhancement Techniques for Power Packages (Rev. B) 06 May 2013
Application note AN-1482 LDO Regulator Stability Using Ceramic Output Capacitors (Rev. A) 25 Apr 2013
Application note AN-1815 LDOs Ease the Stress of Start-Up (Rev. A) 24 Apr 2013
Application note AN-1950 Silently Powering Low Noise Applications (Rev. A) 22 Apr 2013
Application note LDO Performance Near Dropout 08 Oct 2010
Application note 3.6V – 5.5V Input, LDO Reference Design for MSP430 (Rev. A) 14 Jun 2010
Application note 3.6V – 5.5V Input, LDO with Dual-Level Output Reference Design for MSP430 (Rev. A) 14 Jun 2010
Application note Packaging Limits Range of Linear Regulators 08 May 2010
Application note Simple Power Solution Using LDOs for the DM365 (Rev. A) 11 Sep 2009
Application note Digital Designer's Guide to Linear Voltage Regulators & Thermal Mgmt (LDO) (Rev. A) 04 Jun 2008
Application note Linear and Switching Voltage Regulator Fundamental Part 1 21 Mar 2007
Application note Ceramic Capacitors Replace Tantalum Capacitors in LDOs (Rev. A) 13 Oct 2006
Application note Understanding LDO Dropout 09 May 2005
More literature LP2981/85 Product Clip 09 Sep 2004
Application note Extending the Input Voltage Range of an LDO Regulator 16 Aug 2002
Application note Understanding the Terms and Definitions of LDO Voltage Regulators 21 Oct 1999
Application note Technical Review of Low Dropout Voltage Regulator Operation And Performance 30 Aug 1999
Application brief Low Power 150-mA LDO Linear Regulators. Extended Output Voltage Adjustment Range 11 Jun 1999

Design & development

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SLVMA21.ZIP (20 KB) - PSpice Model
Simulation model

LP2985-10 Unencrypted PSpice Transient Model

SNVMB87.ZIP (1 KB) - PSpice Model
Simulation model

LP2985-18 PSpice Transient Model

SLVMA17.ZIP (20 KB) - PSpice Model
Simulation model

LP2985-18 Unencrypted PSpice Transient Model

SNVMB86.ZIP (1 KB) - PSpice Model
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LP2985-25 PSpice Transient Model

SLVMA22.ZIP (20 KB) - PSpice Model
Simulation model

LP2985-25 Unencrypted PSpice Transient Model

SNVMB91.ZIP (1 KB) - PSpice Model
Simulation model

LP2985-28 PSpice Transient Model

SLVMA20.ZIP (20 KB) - PSpice Model
Simulation model

LP2985-28 Unencrypted PSpice Transient Model

SNVMB93.ZIP (1 KB) - PSpice Model
Simulation model

LP2985-29 PSpice Transient Model

SLVMA18.ZIP (20 KB) - PSpice Model
Simulation model

LP2985-29 Unencrypted PSpice Transient Model

SNVMB90.ZIP (1 KB) - PSpice Model
Simulation model

LP2985-30 PSpice Transient Model

SLVMA23.ZIP (20 KB) - PSpice Model
Simulation model

LP2985-30 Unencrypted PSpice Transient Model

SNVMB88.ZIP (1 KB) - PSpice Model
Simulation model

LP2985-33 PSpice Transient Model

SLVMA24.ZIP (20 KB) - PSpice Model
Simulation model

LP2985-33 Unencrypted PSpice Transient Model

SNVMB89.ZIP (1 KB) - PSpice Model
Simulation model

LP2985-50 PSpice Transient Model

SLVMA19.ZIP (20 KB) - PSpice Model
Simulation model

LP2985-50 Unencrypted PSpice Transient Model

SNVMB92.ZIP (1 KB) - PSpice Model
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Package Pins CAD symbols, footprints & 3D models
SOT-23 (DBV) 5 Ultra Librarian

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