Home Interface I2C & I3C ICs I2C general-purpose I/Os (GPIOs)
Home
Interface
I2C & I3C ICs
I2C general-purpose I/Os (GPIOs)

PCA9555

ACTIVE

16-bit 2.3- to 5.5-V I2C/SMBus I/O expander with interrupt, weak pull-up & config registers

Order now
Data sheet

A newer version of this product is available

open-in-new Compare alternates
This product continues to be available for existing customers. New designs should consider an alternate product.
Drop-in replacement with upgraded functionality to the compared device
TCA9555 ACTIVE 16-bit 1.65- to 5.5-V I2C/SMBus I/O expander with interrupt, weak pull-up & config registers Performance enhancements for power-on reset, interrupt, and lower voltage operation.

PCA9555

ACTIVE
Data sheet Order now

Product details

Number of I/Os 16 Features Configuration registers, Interrupt pin Supply voltage (min) (V) 2.3 Supply voltage (max) (V) 5.5 Addresses 8 Rating Catalog Frequency (max) (MHz) 0.4 Operating temperature range (°C) -40 to 85
Number of I/Os 16 Features Configuration registers, Interrupt pin Supply voltage (min) (V) 2.3 Supply voltage (max) (V) 5.5 Addresses 8 Rating Catalog Frequency (max) (MHz) 0.4 Operating temperature range (°C) -40 to 85
SOIC (DW) 24 159.65 mm² 15.5 x 10.3 SSOP (DB) 24 63.96 mm² 8.2 x 7.8 SSOP (DBQ) 24 51.9 mm² 8.65 x 6 TSSOP (PW) 24 49.92 mm² 7.8 x 6.4 TVSOP (DGV) 24 32 mm² 5 x 6.4 VQFN (RGE) 24 16 mm² 4 x 4
  • Low Standby-Current Consumption of 1 µA Max
  • I2C to Parallel Port Expander
  • Open-Drain Active-Low Interrupt Output
  • 5-V Tolerant I/O Ports
  • Compatible With Most Microcontrollers
  • 400-kHz Fast I2C Bus
  • Address by Three Hardware Address Pins for Use of up to Eight Devices
  • Polarity Inversion Register
  • Latched Outputs With High-Current Drive Capability for Directly Driving LEDs
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)
  • Low Standby-Current Consumption of 1 µA Max
  • I2C to Parallel Port Expander
  • Open-Drain Active-Low Interrupt Output
  • 5-V Tolerant I/O Ports
  • Compatible With Most Microcontrollers
  • 400-kHz Fast I2C Bus
  • Address by Three Hardware Address Pins for Use of up to Eight Devices
  • Polarity Inversion Register
  • Latched Outputs With High-Current Drive Capability for Directly Driving LEDs
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

This 16-bit I/O expander for the two-line bidirectional bus (I2C) is designed for 2.3-V to 5.5-V VCC operation. It provides general-purpose remote I/O expansion for most microcontroller families via the I2C interface [serial clock (SCL), serial data (SDA)].

The PCA9555 consists of two 8-bit Configuration (input or output selection), Input Port, Output Port, and Polarity Inversion (active high or active low operation) registers. At power on, the I/Os are configured as inputs. The system master can enable the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for each input or output is kept in the corresponding Input or Output register. The polarity of the Input Port register can be inverted with the Polarity Inversion register. All registers can be read by the system master.

This 16-bit I/O expander for the two-line bidirectional bus (I2C) is designed for 2.3-V to 5.5-V VCC operation. It provides general-purpose remote I/O expansion for most microcontroller families via the I2C interface [serial clock (SCL), serial data (SDA)].

The PCA9555 consists of two 8-bit Configuration (input or output selection), Input Port, Output Port, and Polarity Inversion (active high or active low operation) registers. At power on, the I/Os are configured as inputs. The system master can enable the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for each input or output is kept in the corresponding Input or Output register. The polarity of the Input Port register can be inverted with the Polarity Inversion register. All registers can be read by the system master.
filter Find other I2C general-purpose I/Os (GPIOs)
Download View video with transcript Video

Technical documentation

star =Top documentation for this product selected by TI
No results found. Please clear your search and try again.
View all 11
Type Title Date
* Data sheet PCA9555 Remote 16-bit I2C and SMBus I/O Expander with Interrupt Output and Configuration Registers datasheet (Rev. J) PDF | HTML 11 Mar 2021
Application note I2C: What is the Auto Increment Feature? PDF | HTML 05 Jul 2024
Application note Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) PDF | HTML 03 Jul 2024
Application note I2C Dynamic Addressing 25 Apr 2019
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Choosing the Correct I2C Device for New Designs PDF | HTML 07 Sep 2016
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
Application note Understanding the I2C Bus PDF | HTML 30 Jun 2015
Application note I2C Bus Pull-Up Resistor Calculation PDF | HTML 13 Feb 2015
Application note Programming Fun Lights With TI's TCA6507 30 Nov 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Simulation model

PCA9555 IBIS Model

SCPM035.ZIP (98 KB) - IBIS Model
Download
Design tool

I2C-DESIGNER — I2C designer tool

Use the I2C Designer tool to quickly resolve conflicts in addressing, voltage level and frequency in I2C based designs. Enter master and slave inputs to automatically generate an I2C tree or easily build a custom solution. This tool will help designers save time and comply with the I2C standard (...)
Evaluate in the cloud
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Request
Simulation tool

TINA-TI — SPICE-based analog simulation program

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
User guide: PDF
View Options
Package Pins CAD symbols, footprints & 3D models
SOIC (DW) 24 Ultra Librarian
SSOP (DB) 24 Ultra Librarian
SSOP (DBQ) 24 Ultra Librarian
TSSOP (PW) 24 Ultra Librarian
TVSOP (DGV) 24 Ultra Librarian
VQFN (RGE) 24 Ultra Librarian
TI's Standard Terms and Conditions for Evaluation Items apply.

Ordering & quality

Information included:
  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring
Information included:
  • Fab location
  • Assembly location

Recommended products may have parameters, evaluation modules or reference designs related to this TI product.

Support & training

TI E2E™ forums with technical support from TI engineers

View all forum topics

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos