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SN74AHCT244

ACTIVE

8-ch, 4.5-V to 5.5-V buffers with TTL-compatible CMOS inputs

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Data sheet

SN74AHCT244

ACTIVE
Data sheet Order now

Product details

Technology family AHCT Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Number of channels 8 IOL (max) (mA) 8 Supply current (max) (µA) 40 IOH (max) (mA) -8 Input type TTL-Compatible CMOS Output type Push-Pull Features Balanced outputs, Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 125
Technology family AHCT Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Number of channels 8 IOL (max) (mA) 8 Supply current (max) (µA) 40 IOH (max) (mA) -8 Input type TTL-Compatible CMOS Output type Push-Pull Features Balanced outputs, Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 125
PDIP (N) 20 228.702 mm² 24.33 x 9.4 SOIC (DW) 20 131.84 mm² 12.8 x 10.3 SOP (NS) 20 98.28 mm² 12.6 x 7.8 SSOP (DB) 20 56.16 mm² 7.2 x 7.8 TSSOP (PW) 20 41.6 mm² 6.5 x 6.4 TVSOP (DGV) 20 32 mm² 5 x 6.4
  • Inputs are TTL-voltage compatible
  • Latch-up performance exceeds 250mA Per JESD 17
  • On products compliant to MIL-PRF-38535, All parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
  • Inputs are TTL-voltage compatible
  • Latch-up performance exceeds 250mA Per JESD 17
  • On products compliant to MIL-PRF-38535, All parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.

These octal buffers/drivers are designed specifically to improve both the performance and density of 3-state memory-address drivers, clock drivers, and bus-oriented receivers and transmitters.

These octal buffers/drivers are designed specifically to improve both the performance and density of 3-state memory-address drivers, clock drivers, and bus-oriented receivers and transmitters.
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SN74HCT244 ACTIVE Eight-channel 4.5-V to 5.5-V buffers with TTL-compatible CMOS inputs and tri-state outputs Voltage range (4.5V to 5.5V), average drive strength (4mA), average propagation delay (22ns)

Technical documentation

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Type Title Date
* Data sheet SNx4AHCT244 Octal Buffers/Drivers With 3-State Outputs datasheet (Rev. O) PDF | HTML 22 Jul 2024
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Little Logic Guide 2018 (Rev. G) 06 Jul 2018
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note How to Select Little Logic (Rev. A) 26 Jul 2016
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Product overview Design Summary for WCSP Little Logic (Rev. B) 04 Nov 2004
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
Application note Selecting the Right Level Translation Solution (Rev. A) 22 Jun 2004
Application note Advanced High-Speed CMOS (AHC) Logic Family (Rev. C) 02 Dec 2002
Application note Texas Instruments Little Logic Application Report 01 Nov 2002
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Design guide AHC/AHCT Designer's Guide February 2000 (Rev. D) 24 Feb 2000
Product overview Military Advanced High-Speed CMOS Logic (AHC/AHCT) (Rev. C) 01 Apr 1998
Application note Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices 01 Dec 1997
Application note Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) 01 Aug 1997
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
Application note Live Insertion 01 Oct 1996

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
Not available on TI.com
Simulation model

SN74AHCT244 Behavioral SPICE Model

SLCM005.ZIP (7 KB) - PSpice Model
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Simulation model

SN74AHCT244 IBIS Model (Rev. A)

SCLM058A.ZIP (15 KB) - IBIS Model
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Reference designs

TIDA-00626 — 9.8GHz RF CW Signal Generator Using Integrated Synthesizer With Spur Reduction Reference Design

This design is a 9.8-GHz wideband, low-phase noise, integrated continuous wave (CW) RF signal generator with versatile spur reduction technique. The output level can be programmed from -32 dBm to 14.5 dBm in 0.5-dB steps. This signal generator can be used as local oscillator for applications, such (...)
Design guide: PDF
Schematic: PDF
Package Pins CAD symbols, footprints & 3D models
PDIP (N) 20 Ultra Librarian
SOIC (DW) 20 Ultra Librarian
SOP (NS) 20 Ultra Librarian
SSOP (DB) 20 Ultra Librarian
TSSOP (PW) 20 Ultra Librarian
TVSOP (DGV) 20 Ultra Librarian
TI's Standard Terms and Conditions for Evaluation Items apply.

Ordering & quality

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