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SN74AXCH2T45

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2-bit 0.65V to 3.6V AXC dual-supply bus transciever with bus-hold

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Data sheet

SN74AXCH2T45

ACTIVE
Data sheet Order now

Product details

Technology family AXC Applications JTAG, UART Bits (#) 2 High input voltage (min) (V) 0.45 High input voltage (max) (V) 3.6 Vout (min) (V) 0.65 Vout (max) (V) 3.6 Data rate (max) (Mbps) 380 IOH (max) (mA) -12 IOL (max) (mA) 12 Supply current (max) (µA) 23 Features Bus-hold, Overvoltage tolerant inputs, Partial power down (Ioff), Vcc isolation Input type Standard CMOS Output type Push-Pull Rating Catalog Operating temperature range (°C) -40 to 125
Technology family AXC Applications JTAG, UART Bits (#) 2 High input voltage (min) (V) 0.45 High input voltage (max) (V) 3.6 Vout (min) (V) 0.65 Vout (max) (V) 3.6 Data rate (max) (Mbps) 380 IOH (max) (mA) -12 IOL (max) (mA) 12 Supply current (max) (µA) 23 Features Bus-hold, Overvoltage tolerant inputs, Partial power down (Ioff), Vcc isolation Input type Standard CMOS Output type Push-Pull Rating Catalog Operating temperature range (°C) -40 to 125
VSSOP (DCU) 8 6.2 mm² 2 x 3.1 X2SON (DTM) 8 1.08 mm² 0.8 x 1.35
  • Fully configurable dual-rail design allows each port to operate with a power supply range from 0.65 V to 3.6 V
  • Operating temperature from –40°C to +125°C
  • Glitch-free power supply sequencing
  • Up to 380 Mbps support when translating from 1.8 V to 3.3 V
  • VCC isolation feature
    • If either VCC input is below 100 mV, all I/O outputs are disabled and become high impedance
  • Ioff supports partial-power-down mode operation
  • Compatible with AVC family level shifters
  • Latch-up performance exceeds 100 mA per JESD 78, Class II
  • ESD protection exceeds JESD 22
    • 8000-V human-body model (HBM)
    • 1000-V charged-device model (CDM)
  • Fully configurable dual-rail design allows each port to operate with a power supply range from 0.65 V to 3.6 V
  • Operating temperature from –40°C to +125°C
  • Glitch-free power supply sequencing
  • Up to 380 Mbps support when translating from 1.8 V to 3.3 V
  • VCC isolation feature
    • If either VCC input is below 100 mV, all I/O outputs are disabled and become high impedance
  • Ioff supports partial-power-down mode operation
  • Compatible with AVC family level shifters
  • Latch-up performance exceeds 100 mA per JESD 78, Class II
  • ESD protection exceeds JESD 22
    • 8000-V human-body model (HBM)
    • 1000-V charged-device model (CDM)

The SN74AXCH2T45 is a two-bit non-inverting bus transceiver that uses two individually configurable power-supply rails. The device is operational with both VCCA and VCCB supplies as low as 0.65 V. The A port is designed to track VCCA, which accepts any supply voltage from 0.65 V to 3.6 V. The B port is designed to track VCCB, which also accepts any supply voltage from 0.65 V to 3.6 V. Additionally the SN74AXCH2T45 is compatible with a single-supply system.

The SN74AXCH2T45 device is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control input (DIR). The SN74AXCH2T45 device is designed so the control pin (DIR) is referenced to VCCA.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. If a supply is present for VCCA or VCCB, the bus-hold circuitry always remains active on the A or B inputs respectively, independent of the state of the direction control pin.

This device is fully specified for partial-power-down applications using the Ioff current. The Ioff protection circuitry ensures that no excessive current is drawn from or to an input, output, or combined I/O that is biased to a specific voltage while the device is powered down.

The VCC isolation feature ensures that if either VCCA or VCCB is less than 100 mV, both I/O ports enter a high-impedance state by disabling their outputs.

Glitch-free power supply sequencing allows either supply rail to be powered on or off in any order while providing robust power sequencing performance.

The SN74AXCH2T45 is a two-bit non-inverting bus transceiver that uses two individually configurable power-supply rails. The device is operational with both VCCA and VCCB supplies as low as 0.65 V. The A port is designed to track VCCA, which accepts any supply voltage from 0.65 V to 3.6 V. The B port is designed to track VCCB, which also accepts any supply voltage from 0.65 V to 3.6 V. Additionally the SN74AXCH2T45 is compatible with a single-supply system.

The SN74AXCH2T45 device is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control input (DIR). The SN74AXCH2T45 device is designed so the control pin (DIR) is referenced to VCCA.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. If a supply is present for VCCA or VCCB, the bus-hold circuitry always remains active on the A or B inputs respectively, independent of the state of the direction control pin.

This device is fully specified for partial-power-down applications using the Ioff current. The Ioff protection circuitry ensures that no excessive current is drawn from or to an input, output, or combined I/O that is biased to a specific voltage while the device is powered down.

The VCC isolation feature ensures that if either VCCA or VCCB is less than 100 mV, both I/O ports enter a high-impedance state by disabling their outputs.

Glitch-free power supply sequencing allows either supply rail to be powered on or off in any order while providing robust power sequencing performance.
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Type Title Date
* Data sheet SN74AXCH2T45 2-Bit Bus Transceiver with Configurable Level-Shifting and Bus-Hold Inputs datasheet PDF | HTML 16 Nov 2016
Application note Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators PDF | HTML 12 Jul 2024
Application note Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) PDF | HTML 03 Jul 2024

Design & development

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Evaluation board

5-8-LOGIC-EVM — Generic logic evaluation module for 5-pin to 8-pin DCK, DCT, DCU, DRL and DBV packages

Flexible EVM designed to support any device that has a DCK, DCT, DCU, DRL, or DBV package in a 5 to 8 pin count.
User guide: PDF
Not available on TI.com
Evaluation board

AVCLVCDIRCNTRL-EVM — Generic EVM for Direction-Controlled Bidirectional Translation Device Supporting AVC and LVC

The generic EVM is designed to support one, two, four and eight channel LVC and AVC direction-controlled translation devices. It also supports the bus hold and automotive -Q1 devices in the same number of channels. The AVC are low voltage translation devices with lower drive strength of 12mA. LVC (...)

User guide: PDF
Not available on TI.com
Evaluation board

AXC2T-SMALLPKGEVM — AXC2T small package evaluation module for DTM and RSW package devices

This EVM is designed to support DTM and RSW packages for the AXC and LVC family of DIR controlled bidirectional devices. The AXC and AVC devices belong to the low voltage direction controlled translation family with operating voltage from 0.65V to 3.6V (AXC) and 1.2 to 3.6 (AVC) with 12mA of drive (...)
User guide: PDF
Not available on TI.com
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VSSOP (DCU) 8 Ultra Librarian
X2SON (DTM) 8 Ultra Librarian
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