SN74LV11A-Q1

ACTIVE

Product details

Technology family LV-A Supply voltage (min) (V) 2 Supply voltage (max) (V) 5.5 Number of channels 3 Inputs per channel 3 IOL (max) (mA) 12 IOH (max) (mA) -12 Input type Standard CMOS Output type Push-Pull Features Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Data rate (max) (Mbps) 70 Rating Automotive Operating temperature range (°C) -40 to 105
Technology family LV-A Supply voltage (min) (V) 2 Supply voltage (max) (V) 5.5 Number of channels 3 Inputs per channel 3 IOL (max) (mA) 12 IOH (max) (mA) -12 Input type Standard CMOS Output type Push-Pull Features Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Data rate (max) (Mbps) 70 Rating Automotive Operating temperature range (°C) -40 to 105
TSSOP (PW) 14 32 mm² 5 x 6.4
  • Qualified for Automotive Applications
  • Operation of 2-V to 5.5-V V CC
  • Typical V OLP (Output Ground Bounce) <0.8 V at V CC = 3.3 V, T A = 25°C
  • Typical V OHV (Output V OH Undershoot) >2.3 V at V CC = 3.3 V, T A = 25°C
  • Support Mixed-Mode Voltage Operation on All Ports
  • I off Supports Partial-Power-Down Mode Operation
  • Qualified for Automotive Applications
  • Operation of 2-V to 5.5-V V CC
  • Typical V OLP (Output Ground Bounce) <0.8 V at V CC = 3.3 V, T A = 25°C
  • Typical V OHV (Output V OH Undershoot) >2.3 V at V CC = 3.3 V, T A = 25°C
  • Support Mixed-Mode Voltage Operation on All Ports
  • I off Supports Partial-Power-Down Mode Operation

These triple 3-input positive-AND gates are designed for 2-V to 5.5-V V CC operation.

The SN74LV11A-Q1 devices perform the Boolean function Y = A • B • C or Y = A + B + C in positive logic.

These devices are fully specified for partial-power-down applications using I off. The I off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

These triple 3-input positive-AND gates are designed for 2-V to 5.5-V V CC operation.

The SN74LV11A-Q1 devices perform the Boolean function Y = A • B • C or Y = A + B + C in positive logic.

These devices are fully specified for partial-power-down applications using I off. The I off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

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Technical documentation

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* Data sheet SN74LV11A-Q1 Automotive Triple 3-Input Positive-NAND Gate datasheet (Rev. E) PDF | HTML 14 Jul 2023
More literature Automotive Logic Devices Brochure 27 Aug 2014

Design & development

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Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
Not available on TI.com
Simulation model

SN74LV11A Behavioral SPICE Model

SCEM658.ZIP (8 KB) - PSpice Model
Package Pins CAD symbols, footprints & 3D models
TSSOP (PW) 14 Ultra Librarian

Ordering & quality

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