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SN74LVC165A-Q1

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Automotive, 1.1V to 3.6V parallel-load eight-bit shift registers

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Data sheet

SN74LVC165A-Q1

ACTIVE
Data sheet Order now

Product details

Technology family LVC Supply voltage (min) (V) 1.1 Supply voltage (max) (V) 3.6 Input type CMOS Output type Push-Pull IOL (max) (mA) 24 IOH (max) (mA) -24 Features Over-voltage tolerant inputs, Partial power down (Ioff) Operating temperature range (°C) -40 to 125 Rating Automotive
Technology family LVC Supply voltage (min) (V) 1.1 Supply voltage (max) (V) 3.6 Input type CMOS Output type Push-Pull IOL (max) (mA) 24 IOH (max) (mA) -24 Features Over-voltage tolerant inputs, Partial power down (Ioff) Operating temperature range (°C) -40 to 125 Rating Automotive
TSSOP (PW) 16 32 mm² 5 x 6.4 WQFN (BQB) 16 8.75 mm² 3.5 x 2.5
  • AEC-Q100 qualified for automotive applications:
    • Device temperature grade 1: -40°C to +125°C
    • Device HBM ESD classification level 2
    • Device CDM ESD classification level C4B
  • Operating range from 1.1V to 3.6V
  • Over-voltage tolerant inputs support up to 5.5V independent of VCC
  • Supports partial-power-down with back drive protection (Ioff)

  • High push-pull output drive strength:

    • ±24mA at 3.3V
    • ±8mA at 2.3V
    • ±4mA at 1.65V
  • Maximum propagation delay of 20ns at 3.3V
  • Latch-up performance exceeds 100mAper JESD78 and AEC-Q100-004
  • AEC-Q100 qualified for automotive applications:
    • Device temperature grade 1: -40°C to +125°C
    • Device HBM ESD classification level 2
    • Device CDM ESD classification level C4B
  • Operating range from 1.1V to 3.6V
  • Over-voltage tolerant inputs support up to 5.5V independent of VCC
  • Supports partial-power-down with back drive protection (Ioff)

  • High push-pull output drive strength:

    • ±24mA at 3.3V
    • ±8mA at 2.3V
    • ±4mA at 1.65V
  • Maximum propagation delay of 20ns at 3.3V
  • Latch-up performance exceeds 100mAper JESD78 and AEC-Q100-004

The SN74LVC165A-Q1 contains one 8-bit parallel-load shift register. Data is loaded asynchronously using the shift or load (SH/LD) select pin. The device includes a serial (SER) input to allow for daisy chaining, and a standard (QH) and inverted (QH) output.

The SN74LVC165A-Q1 contains one 8-bit parallel-load shift register. Data is loaded asynchronously using the shift or load (SH/LD) select pin. The device includes a serial (SER) input to allow for daisy chaining, and a standard (QH) and inverted (QH) output.
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Technical documentation

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Type Title Date
* Data sheet SN74LVC165A-Q1 Automotive 8-Bit Parallel-Load Shift Registers datasheet PDF | HTML 30 May 2024
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Little Logic Guide 2018 (Rev. G) 06 Jul 2018
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note How to Select Little Logic (Rev. A) 26 Jul 2016
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Product overview Design Summary for WCSP Little Logic (Rev. B) 04 Nov 2004
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
Application note Selecting the Right Level Translation Solution (Rev. A) 22 Jun 2004
User guide Signal Switch Data Book (Rev. A) 14 Nov 2003
Application note Use of the CMOS Unbuffered Inverter in Oscillator Circuits 06 Nov 2003
User guide LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B) 18 Dec 2002
Application note Texas Instruments Little Logic Application Report 01 Nov 2002
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
More literature Standard Linear & Logic for PCs, Servers & Motherboards 13 Jun 2002
Application note 16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B) 22 May 2002
Application note Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices 10 May 2002
More literature STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS 27 Mar 2002
Application note Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices 01 Dec 1997
Application note Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) 01 Aug 1997
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
Application note LVC Characterization Information 01 Dec 1996
Application note Input and Output Characteristics of Digital Integrated Circuits 01 Oct 1996
Application note Live Insertion 01 Oct 1996
Design guide Low-Voltage Logic (LVC) Designer's Guide 01 Sep 1996
Application note Understanding Advanced Bus-Interface Products Design Guide 01 May 1996

Design & development

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Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
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Evaluation board

14-24-NL-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin non-leaded packages

14-24-NL-LOGIC-EVM is a flexible evaluation module (EVM) designed to support any logic or translation device that has a 14-pin to 24-pin BQA, BQB, RGY, RSV, RJW or RHL package.

User guide: PDF | HTML
Not available on TI.com
Package Pins CAD symbols, footprints & 3D models
TSSOP (PW) 16 Ultra Librarian
WQFN (BQB) 16 Ultra Librarian
TI's Standard Terms and Conditions for Evaluation Items apply.

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