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SN74S1053

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16-Bit Schottky Barrier Diode Bus-Termination Array

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Data sheet

SN74S1053

ACTIVE
Data sheet Order now

Product details

Technology family S Bits (#) 16 Rating Catalog Operating temperature range (°C) 0 to 70
Technology family S Bits (#) 16 Rating Catalog Operating temperature range (°C) 0 to 70
PDIP (N) 20 228.702 mm² 24.33 x 9.4 SOIC (DW) 20 131.84 mm² 12.8 x 10.3 SOP (NS) 20 98.28 mm² 12.6 x 7.8 SSOP (DB) 20 56.16 mm² 7.2 x 7.8 TSSOP (PW) 20 41.6 mm² 6.5 x 6.4
  • Designed to Reduce Reflection Noise
  • Repetitive Peak Forward Current to 200mA
  • 16-Bit Array Structure Suited for Bus-Oriented Systems
  • Package Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPs
  • Designed to Reduce Reflection Noise
  • Repetitive Peak Forward Current to 200mA
  • 16-Bit Array Structure Suited for Bus-Oriented Systems
  • Package Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPs

This Schottky barrier diode bus-termination array is designed to reduce reflection noise on memory bus lines. This device consists of a 16-bit high-speed Schottky diode array suitable for clamping to VCC and/or GND.

The SN74S1053 is characterized for operation from 0°C to 70°C.

This Schottky barrier diode bus-termination array is designed to reduce reflection noise on memory bus lines. This device consists of a 16-bit high-speed Schottky diode array suitable for clamping to VCC and/or GND.

The SN74S1053 is characterized for operation from 0°C to 70°C.
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* Data sheet SN74S1053 datasheet (Rev. A) 01 Aug 1997

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