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TCAN1043-Q1

ACTIVE

Automotive CAN FD transceiver with flexible data-rate and wake input

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TCAN1043A-Q1 ACTIVE Automotive CAN FD transceiver with wake/inhibit/sleep Alternative packaging and enhanced features

TCAN1043-Q1

ACTIVE
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Product details

Protocols CAN, CAN FD Number of channels 1 Supply voltage (V) 5.5 to 40 Bus fault voltage (V) -58 to 58 Signaling rate (max) (bps) 2000000 Rating Automotive
Protocols CAN, CAN FD Number of channels 1 Supply voltage (V) 5.5 to 40 Bus fault voltage (V) -58 to 58 Signaling rate (max) (bps) 2000000 Rating Automotive
SOIC (D) 14 51.9 mm² 8.65 x 6 VSON (DMT) 14 13.5 mm² 4.5 x 3
  • AEC Q100: Qualified for automotive applications
    • Temperature Grade 1: –55°C to 125°C, T A
    • Device HBM classification level: ±16 kV
    • Device CDM classification level: ±1500 V
  • Functional Safety-Capable
  • Meets the requirements of the ISO 11898-2 (2016)
  • All devices support classic CAN and 2Mbps CAN FD (flexible data rate) and "G" options support 5Mbps
    • Short and symmetrical propagation delays and fast loop times for enhanced timing margin
    • Higher data rates in loaded CAN networks
  • V IO Level shifting supports 2.8 V to 5.5 V
  • Operating modes
    • Normal mode
    • Standby Mode with INH output and local and remote wake up request
    • Low power sleep mode with INH output and local and remote wake up request
  • Passive behavior when unpowered
    • Bus and logic terminals are high impedance (no load to operating bus or application)
    • Hot plug capable: power up and down glitch free operation on bus and RXD output
  • Meets or exceeds EMC standard requirements
    • IEC 62228-3 – 2007 compliant
    • SAE J2962-2 compliant
  • Protection features
    • IEC ESD protection of bus terminals: ±8 kV
    • Bus fault protection: ±58 V (non-H variants) and ±70 V (H variants)
    • Undervoltage protection on supply terminals
    • Driver dominant time Out (TXD DTO): data rates down to 9.2 kbps
    • Thermal shutdown protection (TSD)
  • Receiver common mode input voltage: ±30 V
  • Typical loop delay: 110 ns
  • Junction temperatures from –55°C to 150°C
  • Available in SOIC (14) package and leadless VSON (14) package (4.5 mm x 3 mm) with improved automated optical inspection (AOI) capability
  • AEC Q100: Qualified for automotive applications
    • Temperature Grade 1: –55°C to 125°C, T A
    • Device HBM classification level: ±16 kV
    • Device CDM classification level: ±1500 V
  • Functional Safety-Capable
  • Meets the requirements of the ISO 11898-2 (2016)
  • All devices support classic CAN and 2Mbps CAN FD (flexible data rate) and "G" options support 5Mbps
    • Short and symmetrical propagation delays and fast loop times for enhanced timing margin
    • Higher data rates in loaded CAN networks
  • V IO Level shifting supports 2.8 V to 5.5 V
  • Operating modes
    • Normal mode
    • Standby Mode with INH output and local and remote wake up request
    • Low power sleep mode with INH output and local and remote wake up request
  • Passive behavior when unpowered
    • Bus and logic terminals are high impedance (no load to operating bus or application)
    • Hot plug capable: power up and down glitch free operation on bus and RXD output
  • Meets or exceeds EMC standard requirements
    • IEC 62228-3 – 2007 compliant
    • SAE J2962-2 compliant
  • Protection features
    • IEC ESD protection of bus terminals: ±8 kV
    • Bus fault protection: ±58 V (non-H variants) and ±70 V (H variants)
    • Undervoltage protection on supply terminals
    • Driver dominant time Out (TXD DTO): data rates down to 9.2 kbps
    • Thermal shutdown protection (TSD)
  • Receiver common mode input voltage: ±30 V
  • Typical loop delay: 110 ns
  • Junction temperatures from –55°C to 150°C
  • Available in SOIC (14) package and leadless VSON (14) package (4.5 mm x 3 mm) with improved automated optical inspection (AOI) capability

The TCAN1043xx-Q1 meets the physical layer requirements of the ISO 11898–2 (2016) High Speed Controller Area Network (CAN) specification providing an interface between the CAN bus and the CAN protocol controller. These devices support both classical CAN and CAN FD up to 2 megabits per second (Mbps). Devices with part numbers that include the suffix “G” are designed for CAN FD data rates up to 5Mbps. The TCAN1043xx-Q1 allows for system-level reductions in battery current consumption by selectively enabling (via the INH output pin) the various power supplies that can be present on a node. This allows an ultra-low-current sleep state in which power is gated to all system components except for the TCAN1043xx-Q1, which remains in a low-power state monitoring the CAN bus.

When a wake-up pattern is detected on the bus or when a local wake-up is requested via the WAKE input, the TCAN1043xx-Q1 initiates node start-up by driving INH high. The TCAN1043xx-Q1 includes internal logic level translation via the V IO terminal to allow for interfacing directly to 3.3 V or 5 V controllers. The device includes many protection and diagnostic features including CAN bus line short-circuit detection and battery connection detection. The TCAN1043xx-Q1 meets the ESD and EMC requirements of IEC 62228-3 and J2962-2 without the need for additional protection components.

The TCAN1043xx-Q1 meets the physical layer requirements of the ISO 11898–2 (2016) High Speed Controller Area Network (CAN) specification providing an interface between the CAN bus and the CAN protocol controller. These devices support both classical CAN and CAN FD up to 2 megabits per second (Mbps). Devices with part numbers that include the suffix “G” are designed for CAN FD data rates up to 5Mbps. The TCAN1043xx-Q1 allows for system-level reductions in battery current consumption by selectively enabling (via the INH output pin) the various power supplies that can be present on a node. This allows an ultra-low-current sleep state in which power is gated to all system components except for the TCAN1043xx-Q1, which remains in a low-power state monitoring the CAN bus.

When a wake-up pattern is detected on the bus or when a local wake-up is requested via the WAKE input, the TCAN1043xx-Q1 initiates node start-up by driving INH high. The TCAN1043xx-Q1 includes internal logic level translation via the V IO terminal to allow for interfacing directly to 3.3 V or 5 V controllers. The device includes many protection and diagnostic features including CAN bus line short-circuit detection and battery connection detection. The TCAN1043xx-Q1 meets the ESD and EMC requirements of IEC 62228-3 and J2962-2 without the need for additional protection components.
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Type Title Date
* Data sheet TCAN1043xx-Q1 Low-Power Fault Protected CAN Transceiver with CAN FD and Wake datasheet (Rev. F) PDF | HTML 10 Nov 2023
Application note Protecting Automotive CAN Bus Systems From ESD Overvoltage Events PDF | HTML 27 Apr 2022
Functional safety information TCAN1043xx-Q1 Functional Safety, FIT Rate, Failure Mode Distribution and Pin FMA (Rev. A) PDF | HTML 07 Apr 2021
Application note TPS65313-Q1 and TPS65653-Q1 LDO free power solution for AWR1642/AWR1843 27 Jan 2020
User guide TCAN1043HG-Q1 Evaluation Module 30 Oct 2017

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

TCAN1043AEVM — TCAN1043A evaluation module for DYY CAN transceiver with bus filtering, nFAULT and state evaluation

The TI TCAN1043AEVM helps users evaluate the operation and performance of the TCAN1043A-Q1 and TCAN1043M-Q1 CAN FD transceivers in the DYY package.

The ability to perform system-level evaluation using the VIO, EN, INH, nSTB, VSUP, WAKE, and nFAULT pins can be realized on the EVM. It also provides (...)

User guide: PDF | HTML
Not available on TI.com
Evaluation board

TCAN1043DEVM — TCAN1043x-Q1 fault-protected CAN transceiver with CAN FD evaluation module

The TI TCAN1043xx-Q1 EVM helps designers evaluate the operation and performance of the TCAN1043xx-Q1 CAN FD transceiver. The ability to perform system-level evaluation using the VIO, EN, INH, nSTB, VSUP, WAKE, and nFAULT pins can be realized on the EVM. It also provides bus termination, bus (...)

User guide: PDF
Not available on TI.com
Evaluation board

TCAN1463EVM — TCAN1463-Q1 evaluation module for automotive low-power signal improvement CAN FD transceiver

This EVM comes with TCAN1463DRQ1 installed and is used to evaulate transceiver operation in a signal improved capable network. It is configurable for use with the TCAN1043HG-Q1, TCAN1043G-Q1, TCAN1043H-Q1, TCAN1043A-Q1 and the TCAN1043-Q1 14-pin CAN transceivers by replacing the (...)

User guide: PDF
Not available on TI.com
Simulation model

TCAN1043 IBIS Model

SLLM394.ZIP (52 KB) - IBIS Model
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Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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Simulation tool

TINA-TI — SPICE-based analog simulation program

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
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Reference designs

TIDEP-01020 — Automotive domain controller for gateway, assisted and automated driving systems reference design

Decentralized vehicle architectures on the road today use individual ECUs that lack processing power and high-speed interfaces to handle the complex tasks and data movement needs of newly emerging automotive architectures. Higher level functions require the right combination of DMIPS, data (...)
Design guide: PDF
Schematic: PDF
Reference designs

TIDEP-01002 — Cost-optimized digital cluster automotive reference design with Jacinto™ automotive processor

The Jacinto™ automotive processor Digital Cluster Automotive Reference Design (DCARD) is a cost-optimized design for reconfigurable digital cluster systems.  DCARD is a complete and self-contained 6-layer PCB design to enable 60fps digital cluster solutions on 1920x720 resolution (...)
Design guide: PDF
Schematic: PDF
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SOIC (D) 14 Ultra Librarian
VSON (DMT) 14 Ultra Librarian
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