TPS74401

ACTIVE

3-A, low-VIN (0.8-V), low-noise, high-PSRR, adjustable ultra-low-dropout voltage regulator

Product details

Output options Adjustable Output Iout (max) (A) 3 Vin (max) (V) 5.5 Vin (min) (V) 0.8 Vout (max) (V) 3.6 Vout (min) (V) 0.8 Noise (µVrms) 13 Iq (typ) (mA) 3 Thermal resistance θJA (°C/W) 27 Rating Catalog Load capacitance (min) (µF) 0 Regulated outputs (#) 1 Features Enable, Power good, Soft start Accuracy (%) 1 PSRR at 100 KHz (dB) 50 Dropout voltage (Vdo) (typ) (mV) 115 Operating temperature range (°C) -40 to 125
Output options Adjustable Output Iout (max) (A) 3 Vin (max) (V) 5.5 Vin (min) (V) 0.8 Vout (max) (V) 3.6 Vout (min) (V) 0.8 Noise (µVrms) 13 Iq (typ) (mA) 3 Thermal resistance θJA (°C/W) 27 Rating Catalog Load capacitance (min) (µF) 0 Regulated outputs (#) 1 Features Enable, Power good, Soft start Accuracy (%) 1 PSRR at 100 KHz (dB) 50 Dropout voltage (Vdo) (typ) (mV) 115 Operating temperature range (°C) -40 to 125
TO-263 (KTW) 7 153.924 mm² 10.1 x 15.24 VQFN (RGR) 20 12.25 mm² 3.5 x 3.5 VQFN (RGW) 20 25 mm² 5 x 5
  • Input Voltage Range: 1.1 V to 5.5 V
  • Soft-Start (SS) Pin Provides a Linear Startup With Ramp Time Set by External Capacitor
  • 1% Accuracy Over Line, Load, and Temperature
  • Supports Input Voltages as Low as 0.9 V With External Bias Supply
  • Adjustable Output: 0.8 V to 3.6 V
  • Ultra-Low Dropout: 115 mV at 3.0 A (typical)
  • Stable With Any or No Output Capacitor
  • Excellent Transient Response
  • Open-Drain Power-Good (VQFN Only)
  • Packages: 5-mm × 5-mm × 1-mm VQFN (RGW), 3.5-mm × 3.5-mm VQFN (RGR), and DDPAK
  • Input Voltage Range: 1.1 V to 5.5 V
  • Soft-Start (SS) Pin Provides a Linear Startup With Ramp Time Set by External Capacitor
  • 1% Accuracy Over Line, Load, and Temperature
  • Supports Input Voltages as Low as 0.9 V With External Bias Supply
  • Adjustable Output: 0.8 V to 3.6 V
  • Ultra-Low Dropout: 115 mV at 3.0 A (typical)
  • Stable With Any or No Output Capacitor
  • Excellent Transient Response
  • Open-Drain Power-Good (VQFN Only)
  • Packages: 5-mm × 5-mm × 1-mm VQFN (RGW), 3.5-mm × 3.5-mm VQFN (RGR), and DDPAK

The TPS74401 low-dropout (LDO) linear regulators provide an easy-to-use robust power-management solution for a wide variety of applications. The user-programmable soft-start minimizes stress on the input power source by reducing capacitive inrush current on start-up. The soft-start is monotonic and well-suited for powering many different types of processors and application-specific integrated circuits (ASICs). The enable input and power-good output allow easy sequencing with external regulators. This complete flexibility lets the user configure a solution that meets the sequencing requirements of field-programmable gate arrays (FPGAs), digital signal processors (DSPs), and other applications with specific start-up requirements.

A precision reference and error amplifier deliver 1% accuracy over load, line, temperature, and process. The TPS74401 family of LDOs is stable without an output capacitor or with ceramic output capacitors. The device family is fully specified from TJ = –40°C to 125°C. The TPS74401 is offered in two 20-pin small VQFN packages (a 5-mm × 5-mm RGW and a
3.5-mm × 3.5-mm RGR package), yielding a highly compact total solution size. For applications that require additional power dissipation, the DDPAK (KTW) package is also available.

The TPS74401 low-dropout (LDO) linear regulators provide an easy-to-use robust power-management solution for a wide variety of applications. The user-programmable soft-start minimizes stress on the input power source by reducing capacitive inrush current on start-up. The soft-start is monotonic and well-suited for powering many different types of processors and application-specific integrated circuits (ASICs). The enable input and power-good output allow easy sequencing with external regulators. This complete flexibility lets the user configure a solution that meets the sequencing requirements of field-programmable gate arrays (FPGAs), digital signal processors (DSPs), and other applications with specific start-up requirements.

A precision reference and error amplifier deliver 1% accuracy over load, line, temperature, and process. The TPS74401 family of LDOs is stable without an output capacitor or with ceramic output capacitors. The device family is fully specified from TJ = –40°C to 125°C. The TPS74401 is offered in two 20-pin small VQFN packages (a 5-mm × 5-mm RGW and a
3.5-mm × 3.5-mm RGR package), yielding a highly compact total solution size. For applications that require additional power dissipation, the DDPAK (KTW) package is also available.

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TPS74901 ACTIVE 3-A, low-VIN (0.8-V) adjustable ultra-low-dropout voltage regulator with power good and enable 3-A, low-VIN (0.8 V), adjustable ultra-low-dropout voltage regulator with Power-Good & enable

Technical documentation

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Type Title Date
* Data sheet TPS74401 3.0-A, Ultra-LDO with Programmable Soft-Start datasheet (Rev. R) PDF | HTML 06 Apr 2016
Application note LDO Noise Demystified (Rev. B) PDF | HTML 18 Aug 2020
Application note Using Thermal Calculation Tools for Analog Components (Rev. A) 30 Aug 2019
Application note A Topical Index of TI LDO Application Notes (Rev. F) 27 Jun 2019
Selection guide Low Dropout Regulators Quick Reference Guide (Rev. P) 21 Mar 2018
Application note LDO PSRR Measurement Simplified (Rev. A) PDF | HTML 09 Aug 2017
Analog Design Journal 4Q 2012 Issue Analog Applications Journal 25 Sep 2012
Analog Design Journal LDO noise examined in detail 25 Sep 2012
Application note Power Solution Using Discrete DC/DC Converters and LDOs (Rev. B) 26 Aug 2010
Application note Power Ref Design for TMS320C6472, 12-Vin Digital Pwr Cntrlrs, and LDOs (Rev. A) 24 May 2010
Application note Pwr Ref Design f/'C6472 12-Vin Digital Pwr Controllers and LDOs 28 Apr 2010
Application note 'C6472 12Vin Flexible Pwr Design Using DCDC Controllers and LDOs (8x C6472) 26 Mar 2010
Application note Using New Thermal Metrics 15 Dec 2009
Analog Design Journal A 3-A, 1.2-Vout linear regulator with 80% efficiency and Plost < 1W 10 Oct 2006
EVM User's guide TPS74x01EVM-118 User's Guide 20 Jun 2006

Design & development

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Evaluation board

TPS74401EVM-118 — TPS74401 Evaluation Module

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User guide: PDF
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Simulation model

TPS74401 PSpice Transient Model (Rev. B)

SLIM008B.ZIP (63 KB) - PSpice Model
Simulation model

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SLIM010.TSC (120 KB) - TINA-TI Reference Design
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TPS74401 TINA-TI Transient Reference Design

SLIM009.TSC (89 KB) - TINA-TI Reference Design
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TPS74401 TINA-TI Transient Spice Model

SLIM011.ZIP (35 KB) - TINA-TI Spice Model
Simulation model

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SBVM619.ZIP (3 KB) - PSpice Model
Schematic

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Schematic

PMP5149 2

SLVR355.PDF (141 KB)
Schematic

PMP5149 3

SLVR356.PDF (193 KB)
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Reference designs

TIDA-00270 — Current-Sharing Dual LDOs

This power supply topology is capable of sourcing 6A via two LDOs operating in parallel. The solution sources current evenly between the two TPS74401’s, each capable of supplying 3A. This design allows for higher currents to be supplied than is typically possible with a single LDO. It also (...)
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Schematic: PDF
Package Pins CAD symbols, footprints & 3D models
TO-263 (KTW) 7 Ultra Librarian
VQFN (RGR) 20 Ultra Librarian
VQFN (RGW) 20 Ultra Librarian

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