The UCC21732 is a galvanic isolated single channel gate driver designed for SiC MOSFETs and IGBTs up to 2121V DC operating voltage with advanced protection features, best-in-class dynamic performance and robustness. The UCC21732 has up to ±10A peak source and sink current.
The input side is isolated from the output side with SiO2 capacitive isolation technology, supporting up to 1.5kVRMS working voltage, 12.8kVPK surge immunity with longer than 40 years Isolation barrier life, as well as providing low part-to-part skew , >150V/ns common mode noise immunity (CMTI).
The UCC21732 includes the state-of-art protection features, such as fast overcurrent and short circuit detection, shunt current sensing support, fault reporting, active miller clamp, input and output side power supply UVLO to optimize SiC and IGBT switching behavior and robustness. The isolated analog to PWM sensor can be utilized for easier temperature or voltage sensing, further increasing the drivers’ versatility and simplifying the system design effort, size and cost.
The UCC21732 is a galvanic isolated single channel gate driver designed for SiC MOSFETs and IGBTs up to 2121V DC operating voltage with advanced protection features, best-in-class dynamic performance and robustness. The UCC21732 has up to ±10A peak source and sink current.
The input side is isolated from the output side with SiO2 capacitive isolation technology, supporting up to 1.5kVRMS working voltage, 12.8kVPK surge immunity with longer than 40 years Isolation barrier life, as well as providing low part-to-part skew , >150V/ns common mode noise immunity (CMTI).
The UCC21732 includes the state-of-art protection features, such as fast overcurrent and short circuit detection, shunt current sensing support, fault reporting, active miller clamp, input and output side power supply UVLO to optimize SiC and IGBT switching behavior and robustness. The isolated analog to PWM sensor can be utilized for easier temperature or voltage sensing, further increasing the drivers’ versatility and simplifying the system design effort, size and cost.