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UCC27301A

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120V 4A half-bridge driver with 8V UVLO, enable and interlock

Product details

Bootstrap supply voltage (max) (V) 120 Power switch MOSFET Input supply voltage (min) (V) 8 Input supply voltage (max) (V) 17 Peak output current (A) 4 Operating temperature range (°C) -40 to 125 Undervoltage lockout (typ) (V) 8 Rating Catalog Propagation delay time (µs) 0.02 Rise time (ns) 7.2 Fall time (ns) 5.5 Iq (mA) 0.001 Input threshold TTL Channel input logic TTL Switch node voltage (V) -20 Features Negative voltage handling Driver configuration Dual, Noninverting, TTL compatible
Bootstrap supply voltage (max) (V) 120 Power switch MOSFET Input supply voltage (min) (V) 8 Input supply voltage (max) (V) 17 Peak output current (A) 4 Operating temperature range (°C) -40 to 125 Undervoltage lockout (typ) (V) 8 Rating Catalog Propagation delay time (µs) 0.02 Rise time (ns) 7.2 Fall time (ns) 5.5 Iq (mA) 0.001 Input threshold TTL Channel input logic TTL Switch node voltage (V) -20 Features Negative voltage handling Driver configuration Dual, Noninverting, TTL compatible
SOIC (D) 8 29.4 mm² 4.9 x 6 VSON (DRC) 10 9 mm² 3 x 3
  • Drives two N-channel MOSFETs in half-bridge configuration
  • –40°C to +150°C junction temperature range
  • 120V abs max voltage on HB pin
  • 3.7A sink, 4.5A source output currents
  • 8V to 17V VDD operating range (20V abs max) with UVLO
  • –(28–VDD)V abs max negative transient tolerance on HS pin (<100ns pulse)
  • –10V to +20V abs max input pins tolerance, independent of supply voltage range (TTL compatible)
  • Switching parameters:
    • 20ns typical propagation delay times
    • 7.2ns rise and 5.5ns fall time with 1000pF load
    • 4ns typical delay matching
  • Integrated bootstrap diode
  • Input interlock
  • Enable/disable functionality with low current consumption (3µA typical) when disabled (DRC package only)
  • Drives two N-channel MOSFETs in half-bridge configuration
  • –40°C to +150°C junction temperature range
  • 120V abs max voltage on HB pin
  • 3.7A sink, 4.5A source output currents
  • 8V to 17V VDD operating range (20V abs max) with UVLO
  • –(28–VDD)V abs max negative transient tolerance on HS pin (<100ns pulse)
  • –10V to +20V abs max input pins tolerance, independent of supply voltage range (TTL compatible)
  • Switching parameters:
    • 20ns typical propagation delay times
    • 7.2ns rise and 5.5ns fall time with 1000pF load
    • 4ns typical delay matching
  • Integrated bootstrap diode
  • Input interlock
  • Enable/disable functionality with low current consumption (3µA typical) when disabled (DRC package only)

The UCC27301A is a robust gate driver designed to drive two N-channel MOSFETs in a half-bridge or synchronous buck configuration with an absolute maximum bootstrap voltage of 120V. Its 3.7A peak source and 4.5A peak sink current capability allows the UCC27301A to drive large power MOSFETs with minimized switching losses during the transition through the Miller Plateau. The switching node (HS pin) can handle negative transient voltage, which allows the high-side channel to be protected from inherent negative voltages caused by parasitic inductance and stray capacitance.

The inputs are independent of supply voltage and are able to withstand -10V and +20V absolute maximum ratings. The low-side and high-side gate drivers are matched to 4ns between the turn on and turn off of each other and are controlled throught the LI and HI input pins respectively. However, the input interlock logic will turn both driver outputs low whenever both LI and HI inputs are high at the same time. An on-chip 120V rated bootstrap diode eliminates the need to add discrete bootstrap diodes. Undervoltage lockout (UVLO) is provided for both the high-side and the low-side drivers which provides symmetric turn on and turn off behavior and forces the outputs low if the drive voltage is below the specified threshold.

The UCC27301A is a robust gate driver designed to drive two N-channel MOSFETs in a half-bridge or synchronous buck configuration with an absolute maximum bootstrap voltage of 120V. Its 3.7A peak source and 4.5A peak sink current capability allows the UCC27301A to drive large power MOSFETs with minimized switching losses during the transition through the Miller Plateau. The switching node (HS pin) can handle negative transient voltage, which allows the high-side channel to be protected from inherent negative voltages caused by parasitic inductance and stray capacitance.

The inputs are independent of supply voltage and are able to withstand -10V and +20V absolute maximum ratings. The low-side and high-side gate drivers are matched to 4ns between the turn on and turn off of each other and are controlled throught the LI and HI input pins respectively. However, the input interlock logic will turn both driver outputs low whenever both LI and HI inputs are high at the same time. An on-chip 120V rated bootstrap diode eliminates the need to add discrete bootstrap diodes. Undervoltage lockout (UVLO) is provided for both the high-side and the low-side drivers which provides symmetric turn on and turn off behavior and forces the outputs low if the drive voltage is below the specified threshold.

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Technical documentation

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* Data sheet UCC27301A 120V, 3.7A/4.5A Half-Bridge Driver with 8V UVLO, Interlock and Enable datasheet PDF | HTML 22 Jul 2024
Application note How to Choose a Gate Driver for DC Motor Drives PDF | HTML 05 Oct 2023

Design & development

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Evaluation board

UCC27282EVM-335 — UCC27282 120-V, 3-A, 5-V UVLO high-side low-side gate driver evaluation module

UCC27282EVM-335 is designed for evaluating UCC27282DRC, which is a 120V half bridge gate driver with high source and sink peak current capability. This EVM could be served to evaluate the driver IC against its datasheet. The EVM can also be used as Driver IC component selection guide. The EVM can (...)
User guide: PDF
Not available on TI.com
Evaluation board

UCC27288EVM — UCC27288 100-V, 3-A, 8-V UVLO half-bridge gate driver evaluation module

UCC27288EVM is designed for evaluating UCC27288D, which is a 100-V half bridge gate driver with 2.5-A peak source current and 3.5-A peak sink current capability. This EVM serves as a reference design for driving power MOSFETs with up to 20-V drive voltage.
User guide: PDF
Not available on TI.com
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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SOIC (D) 8 Ultra Librarian
VSON (DRC) 10 Ultra Librarian

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