DAC5672
- 14-Bit Dual Transmit Digital-to-Analog Converter (DAC)
- 275 MSPS Update Rate
- Single-Supply: 3 V to 3.6 V
- High Spurious-Free Dynamic Range (SFDR): 84 dBc at 5 MHz
- High Third-Order Two-Tone Intermodulation (IMD3): 79 dBc at 15.1 MHz and 16.1 MHz
- WCDMA Adjacent Channel Leakage Ratio (ACLR): 78 dB at Baseband
- WCDMA ACLR: 73 dB at 30.72 MHz
- Independent or Single Resistor Gain Control
- Dual or Interleaved Data
- On-Chip 1.2-V Reference
- Low Power: 330 mW
- Power-Down Mode: 9 mW
- Package: 48-Pin Thin-Quad Flat Pack (TQFP)
The DAC5672 device is a monolithic, dual-channel, 14-bit, high-speed DAC with on-chip voltage reference.
Operating with update rates of up to 275 MSPS, the DAC5672 offers exceptional dynamic performance, tight-gain, and offset matching characteristics that make the device well-suited in I/Q baseband or direct IF communication applications.
Each DAC has a high-impedance, differential-current output suitable for single-ended or differential analog-output configurations. External resistors allow scaling the full-scale output current for each DAC separately or together, typically between 2 mA and 20 mA. An accurate on-chip voltage reference is temperature-compensated and delivers a stable 1.2-V reference voltage. Optionally, an external reference may be used.
The DAC5672 has two, 14-bit, parallel input ports with separate clocks and data latches. For flexibility, the DAC5672 supports multiplexed data for each DAC on one port when operating in interleaved mode.
The DAC5672 is specifically designed for a differential transformer-coupled output with a 50-Ω doubly-terminated load. For a 20-mA full-scale output current, a 4:1 impedance ratio (resulting in an output power of 4 dBm) and 1:1 impedance ratio transformer (–2 dBm output power) are supported.
The DAC5672 is available in a 48-pin TQFP package. Pin compatibility between family members provides 12-bit (DAC5662) and 14-bit (DAC5672) resolutions. Furthermore, the DAC5672 is pin compatible to the DAC2904 and AD9767 dual DACs. The device is characterized for operation over the industrial temperature range from –40°C to 85°C.
技术文档
| 类型 | 标题 | 下载最新的英语版本 | 日期 | |||
|---|---|---|---|---|---|---|
| * | 数据表 | Dual 14 Bit 275 MSPS DAC 数据表 (Rev. D) | 2017年 8月 4日 | |||
| 用户指南 | TSW6011EVM Quick Start Guide (Rev. D) | 2016年 8月 17日 | ||||
| 应用手册 | Wideband Complementary Current Output DAC Single-Ended Interface (Rev. A) | 2015年 5月 8日 | ||||
| 设计指南 | Direct Down-Conversion System With I/Q Correction (TIDA-00078 CerTIfied Design) | 2013年 7月 23日 | ||||
| 应用手册 | High Speed, Digital-to-Analog Converters Basics (Rev. A) | 2012年 10月 23日 | ||||
| 应用手册 | Passive Terminations for Current Output DACs | 2008年 11月 10日 | ||||
| 应用手册 | 所选封装材料的热学和电学性质 | 2008年 10月 16日 | ||||
| 应用手册 | 高速数据转换 | 英语版 | 2008年 10月 16日 | |||
| 应用手册 | CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters | 2008年 6月 8日 | ||||
| 应用手册 | Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 | 2008年 6月 2日 | ||||
| EVM 用户指南 | DAC5672/62/52 14- and 12-Bit Dual Channel DAC EVM (Rev. B) | 2006年 3月 24日 |
设计和开发
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| 封装 | 引脚 | CAD 符号、封装和 3D 模型 |
|---|---|---|
| TQFP (PFB) | 48 | Ultra Librarian |
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