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SN74AXCH2T45

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具有总线保持电流的 2 位 0.65V 至 3.6V AXC 双电源总线收发器

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SN74AXCH2T45

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米6体育平台手机版_好二三四详情

Technology family AXC Applications JTAG, UART Bits (#) 2 High input voltage (min) (V) 0.45 High input voltage (max) (V) 3.6 Vout (min) (V) 0.65 Vout (max) (V) 3.6 Data rate (max) (Mbps) 380 IOH (max) (mA) -12 IOL (max) (mA) 12 Supply current (max) (µA) 23 Features Bus-hold, Overvoltage tolerant inputs, Partial power down (Ioff), Vcc isolation Input type Standard CMOS Output type Push-Pull Rating Catalog Operating temperature range (°C) -40 to 125
Technology family AXC Applications JTAG, UART Bits (#) 2 High input voltage (min) (V) 0.45 High input voltage (max) (V) 3.6 Vout (min) (V) 0.65 Vout (max) (V) 3.6 Data rate (max) (Mbps) 380 IOH (max) (mA) -12 IOL (max) (mA) 12 Supply current (max) (µA) 23 Features Bus-hold, Overvoltage tolerant inputs, Partial power down (Ioff), Vcc isolation Input type Standard CMOS Output type Push-Pull Rating Catalog Operating temperature range (°C) -40 to 125
VSSOP (DCU) 8 6.2 mm² 2 x 3.1 X2SON (DTM) 8 1.08 mm² 0.8 x 1.35
  • Fully configurable dual-rail design allows each port to operate with a power supply range from 0.65 V to 3.6 V
  • Operating temperature from –40°C to +125°C
  • Glitch-free power supply sequencing
  • Up to 380 Mbps support when translating from 1.8 V to 3.3 V
  • VCC isolation feature
    • If either VCC input is below 100 mV, all I/O outputs are disabled and become high impedance
  • Ioff supports partial-power-down mode operation
  • Compatible with AVC family level shifters
  • Latch-up performance exceeds 100 mA per JESD 78, Class II
  • ESD protection exceeds JESD 22
    • 8000-V human-body model (HBM)
    • 1000-V charged-device model (CDM)
  • Fully configurable dual-rail design allows each port to operate with a power supply range from 0.65 V to 3.6 V
  • Operating temperature from –40°C to +125°C
  • Glitch-free power supply sequencing
  • Up to 380 Mbps support when translating from 1.8 V to 3.3 V
  • VCC isolation feature
    • If either VCC input is below 100 mV, all I/O outputs are disabled and become high impedance
  • Ioff supports partial-power-down mode operation
  • Compatible with AVC family level shifters
  • Latch-up performance exceeds 100 mA per JESD 78, Class II
  • ESD protection exceeds JESD 22
    • 8000-V human-body model (HBM)
    • 1000-V charged-device model (CDM)

The SN74AXCH2T45 is a two-bit non-inverting bus transceiver that uses two individually configurable power-supply rails. The device is operational with both VCCA and VCCB supplies as low as 0.65 V. The A port is designed to track VCCA, which accepts any supply voltage from 0.65 V to 3.6 V. The B port is designed to track VCCB, which also accepts any supply voltage from 0.65 V to 3.6 V. Additionally the SN74AXCH2T45 is compatible with a single-supply system.

The SN74AXCH2T45 device is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control input (DIR). The SN74AXCH2T45 device is designed so the control pin (DIR) is referenced to VCCA.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. If a supply is present for VCCA or VCCB, the bus-hold circuitry always remains active on the A or B inputs respectively, independent of the state of the direction control pin.

This device is fully specified for partial-power-down applications using the Ioff current. The Ioff protection circuitry ensures that no excessive current is drawn from or to an input, output, or combined I/O that is biased to a specific voltage while the device is powered down.

The VCC isolation feature ensures that if either VCCA or VCCB is less than 100 mV, both I/O ports enter a high-impedance state by disabling their outputs.

Glitch-free power supply sequencing allows either supply rail to be powered on or off in any order while providing robust power sequencing performance.

The SN74AXCH2T45 is a two-bit non-inverting bus transceiver that uses two individually configurable power-supply rails. The device is operational with both VCCA and VCCB supplies as low as 0.65 V. The A port is designed to track VCCA, which accepts any supply voltage from 0.65 V to 3.6 V. The B port is designed to track VCCB, which also accepts any supply voltage from 0.65 V to 3.6 V. Additionally the SN74AXCH2T45 is compatible with a single-supply system.

The SN74AXCH2T45 device is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control input (DIR). The SN74AXCH2T45 device is designed so the control pin (DIR) is referenced to VCCA.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. If a supply is present for VCCA or VCCB, the bus-hold circuitry always remains active on the A or B inputs respectively, independent of the state of the direction control pin.

This device is fully specified for partial-power-down applications using the Ioff current. The Ioff protection circuitry ensures that no excessive current is drawn from or to an input, output, or combined I/O that is biased to a specific voltage while the device is powered down.

The VCC isolation feature ensures that if either VCCA or VCCB is less than 100 mV, both I/O ports enter a high-impedance state by disabling their outputs.

Glitch-free power supply sequencing allows either supply rail to be powered on or off in any order while providing robust power sequencing performance.
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类型 标题 下载最新的英语版本 日期
* 数据表 SN74AXCH2T45 2-Bit Bus Transceiver with Configurable Level-Shifting and Bus-Hold Inputs 数据表 PDF | HTML 2016年 11月 16日
应用手册 Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators PDF | HTML 2024年 7月 12日
应用手册 Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) PDF | HTML 2024年 7月 3日
应用手册 了解 CMOS 输出缓冲器中的瞬态驱动强度与直流驱动强度 PDF | HTML 最新英语版本 (Rev.A) PDF | HTML 2024年 5月 15日

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封装 引脚 CAD 符号、封装和 3D 模型
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  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
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  • 封装厂地点

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