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SN74CBTH16211

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具有总线保持功能的 5V、1:1 (SPST)、24 通道 FET 总线开关

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数据表

SN74CBTH16211

正在供货
数据表 立即订购

米6体育平台手机版_好二三四详情

Configuration 1:1 SPST Number of channels 24 Power supply voltage - single (V) 5 Protocols Analog Ron (typ) (Ω) 5 Bandwidth (MHz) 200 Operating temperature range (°C) -40 to 85 Input/output continuous current (max) (mA) 128 Rating Catalog Drain supply voltage (max) (V) 5.5 Supply voltage (max) (V) 5.5
Configuration 1:1 SPST Number of channels 24 Power supply voltage - single (V) 5 Protocols Analog Ron (typ) (Ω) 5 Bandwidth (MHz) 200 Operating temperature range (°C) -40 to 85 Input/output continuous current (max) (mA) 128 Rating Catalog Drain supply voltage (max) (V) 5.5 Supply voltage (max) (V) 5.5
TSSOP (DGG) 56 113.4 mm² 14 x 8.1
  • 5- Switch Connection Between Two Ports
  • TTL-Compatible Input Levels
  • Bus Hold on Data Inputs/Outputs Eliminates the Need for External Pullup/Pulldown Resistors
  • 5- Switch Connection Between Two Ports
  • TTL-Compatible Input Levels
  • Bus Hold on Data Inputs/Outputs Eliminates the Need for External Pullup/Pulldown Resistors

The SN74CBTH16211 provides 24 bits of high-speed TTL-compatible bus switching. The low on-state resistance of the switch allows connections to be made with minimal propagation delay.

The device is organized as dual 12-bit bus switches with separate output-enable (OE\) inputs. It can be used as two 12-bit bus switches or one 24-bit bus switch. When OE\ is low, the associated 12-bit bus switch is on, and the A port is connected to the B port. When OE\ is high, the switch is open, and a high-impedance state exists between the two ports.

Active bus-hold circuitry is provided to hold unused or floating A and B ports at a valid logic level.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74CBTH16211 provides 24 bits of high-speed TTL-compatible bus switching. The low on-state resistance of the switch allows connections to be made with minimal propagation delay.

The device is organized as dual 12-bit bus switches with separate output-enable (OE\) inputs. It can be used as two 12-bit bus switches or one 24-bit bus switch. When OE\ is low, the associated 12-bit bus switch is on, and the A port is connected to the B port. When OE\ is high, the switch is open, and a high-impedance state exists between the two ports.

Active bus-hold circuitry is provided to hold unused or floating A and B ports at a valid logic level.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
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SN74CBT16211C 正在供货 具有 –2V 下冲保护的 5V、1:1 (SPST)、24 通道 FET 总线开关 Lower internal resistance

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类型 标题 下载最新的英语版本 日期
* 数据表 24-Bit FET Bus Switch With Bus Hold 数据表 (Rev. C) 2001年 11月 13日

订购和质量

包含信息：
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
包含信息：
  • 制造厂地点
  • 封装厂地点

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