米6体育平台手机版_好二三四详情

Technology family F Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Number of channels 8 IOL (max) (mA) 64 Supply current (max) (µA) 90000 IOH (max) (mA) -15 Input type Bipolar Output type 3-State Features Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) 0 to 70
Technology family F Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Number of channels 8 IOL (max) (mA) 64 Supply current (max) (µA) 90000 IOH (max) (mA) -15 Input type Bipolar Output type 3-State Features Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) 0 to 70
PDIP (N) 20 228.702 mm² 24.33 x 9.4 SOIC (DW) 20 131.84 mm² 12.8 x 10.3 SOP (NS) 20 98.28 mm² 12.6 x 7.8 SSOP (DB) 20 56.16 mm² 7.2 x 7.8
  • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers
  • Package Options Include Plastic Small-Outline (SOIC) and Shrink Small-Outline (SSOP) Packages, Ceramic Chip Carriers, and Plastic and Ceramic DIPs
  • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers
  • Package Options Include Plastic Small-Outline (SOIC) and Shrink Small-Outline (SSOP) Packages, Ceramic Chip Carriers, and Plastic and Ceramic DIPs

These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. Taken together with the ´F240 and ´F241, these devices provide the choice of selected combinations of inverting and noninverting outputs, symmetrical (active-low output-enable) inputs, and complementary OE and inputs.

The ´F244 is organized as two 4-bit buffers/line drivers with separate output enable () inputs. When is low, the device passes data from the A inputs to the Y outputs. When is high, the outputs are in the high-impedance state.

The SN74F244 is available in TI's shrink small-outline package (DB), which provides the same I/O pin count and functionality of standard small-outline packages in less than half the printed-circuit-board area.

The SN54F244 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74F244 is characterized for operation from 0°C to 70°C.

 

 

These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. Taken together with the ´F240 and ´F241, these devices provide the choice of selected combinations of inverting and noninverting outputs, symmetrical (active-low output-enable) inputs, and complementary OE and inputs.

The ´F244 is organized as two 4-bit buffers/line drivers with separate output enable () inputs. When is low, the device passes data from the A inputs to the Y outputs. When is high, the outputs are in the high-impedance state.

The SN74F244 is available in TI's shrink small-outline package (DB), which provides the same I/O pin count and functionality of standard small-outline packages in less than half the printed-circuit-board area.

The SN54F244 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74F244 is characterized for operation from 0°C to 70°C.

 

 

下载 观看带字幕的视频 视频

您可能感兴趣的相似米6体育平台手机版_好二三四

功能与比较器件相同,且具有相同引脚
SN74HC244 正在供货 具有三态输出的 8 通道、2V 至 6V 缓冲器 Voltage range (2V to 6V), average drive strength (8mA), average propagation delay (20ns)

技术文档

star =有关此米6体育平台手机版_好二三四的 TI 精选热门文档
未找到结果。请清除搜索并重试。
查看全部 10
类型 标题 下载最新的英语版本 日期
* 数据表 Octal Buffers/Drivers With 3-State Outputs 数据表 (Rev. A) 1993年 10月 1日
选择指南 Logic Guide (Rev. AB) 2017年 6月 12日
应用手册 Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015年 12月 2日
选择指南 逻辑器件指南 2014 (Rev. AA) 最新英语版本 (Rev.AB) 2014年 11月 17日
用户指南 LOGIC Pocket Data Book (Rev. B) 2007年 1月 16日
应用手册 Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004年 7月 8日
应用手册 TI IBIS File Creation, Validation, and Distribution Processes 2002年 8月 29日
应用手册 Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) 1997年 8月 1日
应用手册 使用逻辑器件进行设计 (Rev. C) 1997年 6月 1日
应用手册 Input and Output Characteristics of Digital Integrated Circuits 1996年 10月 1日

设计和开发

如需其他信息或资源,请点击以下任一标题进入详情页面查看(如有)。

评估板

14-24-LOGIC-EVM — 采用 14 引脚至 24 引脚 D、DB、DGV、DW、DYY、NS 和 PW 封装的逻辑米6体育平台手机版_好二三四通用评估模块

14-24-LOGIC-EVM 评估模块 (EVM) 旨在支持采用 14 引脚至 24 引脚 D、DW、DB、NS、PW、DYY 或 DGV 封装的任何逻辑器件。

用户指南: PDF | HTML
英语版 (Rev.B): PDF | HTML
TI.com 上无现货
仿真模型

SN74F244 Behavioral SPICE Model

SDFM024.ZIP (7 KB) - PSpice Model
仿真模型

SN74F244 IBIS Model (Rev. A)

SDFM008A.ZIP (6 KB) - IBIS Model
封装 引脚 CAD 符号、封装和 3D 模型
PDIP (N) 20 Ultra Librarian
SOIC (DW) 20 Ultra Librarian
SOP (NS) 20 Ultra Librarian
SSOP (DB) 20 Ultra Librarian

订购和质量

包含信息:
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
包含信息:
  • 制造厂地点
  • 封装厂地点

支持和培训

视频