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SRC4392

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SRC4392

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米6体育平台手机版_好二三四详情

Number of SRC channels 2 Digital audio interface AES/EBU, S/PDIF Dynamic range (dB) 144 Digital supply (up to 5 V) (V) 1.65 - 1.95, 3 - 3.6 THD+N (dB) -140 Control mode H/W, SW (SPI) Power supply (V) 1.8, 3.3 Control interface I2C, SPI Audio data format I2S, Normal Rating Catalog Operating temperature range (°C) -40 to 85 Sampling rate (max) (kHz) 216
Number of SRC channels 2 Digital audio interface AES/EBU, S/PDIF Dynamic range (dB) 144 Digital supply (up to 5 V) (V) 1.65 - 1.95, 3 - 3.6 THD+N (dB) -140 Control mode H/W, SW (SPI) Power supply (V) 1.8, 3.3 Control interface I2C, SPI Audio data format I2S, Normal Rating Catalog Operating temperature range (°C) -40 to 85 Sampling rate (max) (kHz) 216
TQFP (PFB) 48 81 mm² 9 x 9
  • Two-Channel Asynchronous Sample Rate Converter (SRC)
    • Dynamic Range with –60dB Input (A-Weighted): 144dB typical
    • Total Harmonic Distortion and Noise (THD+N) with Full-Scale Input: –140dB typical
    • Supports Audio Input and Output Data Word Lengths Up to 24 Bits
    • Supports Input and Output Sampling Frequencies Up to 216kHz
    • Automatic Detection of the Input-to-Output Sampling Ratio
    • Wide Input-to-Output Conversion Range:
      16:1 to 1:16 Continuous
    • Excellent Jitter Attenuation Characteristics
    • Digital De-Emphasis Filtering for 32kHz, 44.1kHz, and 48kHz Input Sampling Rates
    • Digital Output Attenuation and Mute Functions
    • Output Word Length Reduction
    • Status Registers and Interrupt Generation for Sampling Ratio and Ready Flags
  • Digital Audio Interface Transmitter (DIT)
    • Supports Sampling Rates Up to 216kHz
    • Includes Differential Line Driver and
      CMOS Buffered Outputs
    • Block-Sized Data Buffers for Both Channel Status and User Data
    • Status Registers and Interrupt Generation for Flag and Error Conditions
  • User-Selectable Serial Host Interface: SPI or Philips I2C™
    • Provides Access to On-Chip Registers and Data Buffers

    U.S. Patent No. 7,262,716

  • Digital Audio Interface Receiver (DIR)
    • PLL Lock Range Includes Sampling Rates from 20kHz to 216kHz
    • Includes Four Differential Input Line Receivers and an Input Multiplexer
    • Bypass Multiplexer Routes Line Receiver Outputs to Line Driver and Buffer Outputs
    • Block-Sized Data Buffers for Both Channel Status and User Data
    • Automatic Detection of Non-PCM Audio Streams (DTS CD/LD and IEC 61937 formats)
    • Audio CD Q-Channel Sub-Code Decoding and Data Buffer
    • Status Registers and Interrupt Generation for Flag and Error Conditions
    • Low Jitter Recovered Clock Output
  • Two Audio Serial Ports (Ports A and B)
    • Synchronous Serial Interface to External Signal Processors, Data Converters, and Logic
    • Slave or Master Mode Operation with Sampling Rates up to 216kHz
    • Supports Left-Justified, Right-Justified, and Philips I2S™ Data Formats
    • Supports Audio Data Word Lengths Up to
      24 Bits
  • Four General-Purpose Digital Outputs
    • Multifunction Programmable Via Control Registers
  • Extensive Power-Down Support
    • Functional Blocks May Be Disabled Individually When Not In Use
  • Operates From +1.8V Core and +3.3V I/O Power Supplies
  • Packages:
    • QFN-40
    • Small TQFP-48 Package, Compatible with the SRC4382 and DIX4192
  • Two-Channel Asynchronous Sample Rate Converter (SRC)
    • Dynamic Range with –60dB Input (A-Weighted): 144dB typical
    • Total Harmonic Distortion and Noise (THD+N) with Full-Scale Input: –140dB typical
    • Supports Audio Input and Output Data Word Lengths Up to 24 Bits
    • Supports Input and Output Sampling Frequencies Up to 216kHz
    • Automatic Detection of the Input-to-Output Sampling Ratio
    • Wide Input-to-Output Conversion Range:
      16:1 to 1:16 Continuous
    • Excellent Jitter Attenuation Characteristics
    • Digital De-Emphasis Filtering for 32kHz, 44.1kHz, and 48kHz Input Sampling Rates
    • Digital Output Attenuation and Mute Functions
    • Output Word Length Reduction
    • Status Registers and Interrupt Generation for Sampling Ratio and Ready Flags
  • Digital Audio Interface Transmitter (DIT)
    • Supports Sampling Rates Up to 216kHz
    • Includes Differential Line Driver and
      CMOS Buffered Outputs
    • Block-Sized Data Buffers for Both Channel Status and User Data
    • Status Registers and Interrupt Generation for Flag and Error Conditions
  • User-Selectable Serial Host Interface: SPI or Philips I2C™
    • Provides Access to On-Chip Registers and Data Buffers

    U.S. Patent No. 7,262,716

  • Digital Audio Interface Receiver (DIR)
    • PLL Lock Range Includes Sampling Rates from 20kHz to 216kHz
    • Includes Four Differential Input Line Receivers and an Input Multiplexer
    • Bypass Multiplexer Routes Line Receiver Outputs to Line Driver and Buffer Outputs
    • Block-Sized Data Buffers for Both Channel Status and User Data
    • Automatic Detection of Non-PCM Audio Streams (DTS CD/LD and IEC 61937 formats)
    • Audio CD Q-Channel Sub-Code Decoding and Data Buffer
    • Status Registers and Interrupt Generation for Flag and Error Conditions
    • Low Jitter Recovered Clock Output
  • Two Audio Serial Ports (Ports A and B)
    • Synchronous Serial Interface to External Signal Processors, Data Converters, and Logic
    • Slave or Master Mode Operation with Sampling Rates up to 216kHz
    • Supports Left-Justified, Right-Justified, and Philips I2S™ Data Formats
    • Supports Audio Data Word Lengths Up to
      24 Bits
  • Four General-Purpose Digital Outputs
    • Multifunction Programmable Via Control Registers
  • Extensive Power-Down Support
    • Functional Blocks May Be Disabled Individually When Not In Use
  • Operates From +1.8V Core and +3.3V I/O Power Supplies
  • Packages:
    • QFN-40
    • Small TQFP-48 Package, Compatible with the SRC4382 and DIX4192

The SRC4392 is a highly-integrated CMOS device designed for use in professional and broadcast digital audio systems. The SRC4392 combines a high-performance, two-channel, asynchronous sample rate converter (SRC) with a digital audio interface receiver (DIR) and transmitter (DIT), two audio serial ports, and flexible distribution logic for interconnection of the function block data and clocks.

The DIR and DIT are compatible with the AES3, S/PDIF, IEC 60958, and EIAJ CP-1201 interface standards. The audio serial ports, DIT, and SRC may be operated at sampling rates up to 216kHz. The DIR lock range includes sampling rates from 20kHz to 216kHz.

The SRC4392 is configured using on-chip control registers and data buffers, which are accessed through either a 4-wire serial peripheral interface (SPI) port, or a 2-wire Philips I2C bus interface. Status registers provide access to a variety of flag and error bits, which are derived from the various function blocks. An open drain interrupt output pin is provided, and is supported by flexible interrupt reporting and mask options via control register settings. A master reset input pin is provided for initialization by a host processor or supervisory functions.

The SRC4392 requires a +1.8V core logic supply, in addition to a +3.3V supply for powering portions of the DIR, DIT, and line driver and receiver functions. A separate logic I/O supply supports operation from +1.65V to +3.6V, providing compatibility with low voltage logic interfaces typically found on digital signal processors and programmable logic devices. The SRC4392 is available in a QFN-40 and a lead-free, TQFP-48 package. The TQFN-48 is pin- and register-compatible with the Texas Instruments SRC4382 and DIX4192 products.

The SRC4392 is a highly-integrated CMOS device designed for use in professional and broadcast digital audio systems. The SRC4392 combines a high-performance, two-channel, asynchronous sample rate converter (SRC) with a digital audio interface receiver (DIR) and transmitter (DIT), two audio serial ports, and flexible distribution logic for interconnection of the function block data and clocks.

The DIR and DIT are compatible with the AES3, S/PDIF, IEC 60958, and EIAJ CP-1201 interface standards. The audio serial ports, DIT, and SRC may be operated at sampling rates up to 216kHz. The DIR lock range includes sampling rates from 20kHz to 216kHz.

The SRC4392 is configured using on-chip control registers and data buffers, which are accessed through either a 4-wire serial peripheral interface (SPI) port, or a 2-wire Philips I2C bus interface. Status registers provide access to a variety of flag and error bits, which are derived from the various function blocks. An open drain interrupt output pin is provided, and is supported by flexible interrupt reporting and mask options via control register settings. A master reset input pin is provided for initialization by a host processor or supervisory functions.

The SRC4392 requires a +1.8V core logic supply, in addition to a +3.3V supply for powering portions of the DIR, DIT, and line driver and receiver functions. A separate logic I/O supply supports operation from +1.65V to +3.6V, providing compatibility with low voltage logic interfaces typically found on digital signal processors and programmable logic devices. The SRC4392 is available in a QFN-40 and a lead-free, TQFP-48 package. The TQFN-48 is pin- and register-compatible with the Texas Instruments SRC4382 and DIX4192 products.
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类型 标题 下载最新的英语版本 日期
* 数据表 Two-Channel, Asynchronous Sample Rate Converter with Integrated Digital Audio . 数据表 (Rev. D) 2012年 12月 18日
EVM 用户指南 SRC4382EVM-PDK and SRC4392EVM-PDK User's Guide (Rev. A) 2016年 8月 25日

设计和开发

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评估板

PP-SALB2-EVM — PP-SALB2-EVM 智能放大器扬声器特性板评估模块（学习板 2）

该板支持：TAS2555YZEVM、TAS2557EVM 和 TAS2559EVM。

智能放大器扬声器特性评估板与支持的 TI 智能放大器和 PurePath 控制台软件一起使用时，可让用户测量扬声器与 TI 智能放大器米6体育平台手机版_好二三四结合使用时的偏移、温度及其他参数。整个解决方案通过一套易于使用和循序渐进的流程来指导您完成整个扬声器特性评估过程。一旦特性评估完成，扬声器参数随后将自动载入到 PurePath 控制台中，以便开始进行精细调优以实现最佳音质及扬声器保护。

用户指南: PDF
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评估板

SRC4392EVM-PDK — SRC4392 评估模块 (EVM) 和 USB 主板

The SRC4392EVM-PDK provides a modular solution for evaluating the function and performance of the SRC4392 device from Texas Instruments. The PDK includes a motherboard (DAIMB) and a daughterboard (SRC4392EVM). These boards are plugged into each other to allow a complete solution for analysis of the (...)

用户指南: PDF
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评估板

TAS3251EVM — TAS3251 175W 立体声/350W 单声道超高清数字输入 D 类放大器评估模块

TAS3251 超高清音频评估模块展示了米6体育平台手机版_好二三四 (TI) 的 TAS3251 集成电路。TAS3251 是一款数字输入高性能 D 类音频放大器，可实现真正的高端音质和 D 类效率。该数字前端采用具有用于高级音频处理（包括 SmartAmp 和 SmartEQ）的集成 DSP 的高性能 Burr-Brown™ DAC。该单芯片解决方案集成降低了总体系统解决方案尺寸和成本。该 DSP 受 TI PurePath™ 控制台图形调节软件支持，可以快速轻松地调节和控制扬声器。D (...)

用户指南: PDF
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PSPICE-FOR-TI — 适用于 TI 设计和模拟工具的 PSpice®

PSpice® for TI 可提供帮助评估模拟电路功能的设计和仿真环境。此功能齐全的设计和仿真套件使用 Cadence® 的模拟分析引擎。PSpice for TI 可免费使用，包括业内超大的模型库之一，涵盖我们的模拟和电源米6体育平台手机版_好二三四系列以及精选的模拟行为模型。

借助 PSpice for TI 的设计和仿真环境及其内置的模型库，您可对复杂的混合信号设计进行仿真。创建完整的终端设备设计和原型解决方案，然后再进行布局和制造，可缩短米6体育平台手机版_好二三四上市时间并降低开发成本。

在 PSpice for TI 设计和仿真工具中，您可以搜索 TI (...)



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参考设计

TIDA-00874 — 具有数字输入和处理功能的高保真 175W D 类音频放大器参考设计

此设计使用高度灵活的 PCM5242 差动输出 DAC 将极高性能的模拟输入 TPA3251D2 D 类放大器转变为具有音频处理功能的数字输入系统。现在，可以通过各种数字输入源实现 TPA3251D2 放大器的完整性能。PCM5242 DAC 的模拟差动输出和高 SNR 是 TPA3251D2 放大器的完整差动模拟输入的完美搭档，可实现出色的噪声性能和极低的失真。通过 PCM5242 上的 miniDSP，可添加音频处理和滤波功能，从而进一步增强终端设备中的音频性能。
测试报告: PDF
原理图: PDF
参考设计

TIDA-00403 — 采用 TLV320AIC3268 miniDSP 编解码器的超声波测距参考设计

TIDA-00403 参考设计使用针对超声测距解决方案的现成的 EVM，该解决方案使用 TLV320AIC3268 miniDSP 内的算法。通过将该设计与 TI 的 PurePath Studio 设计套件结合使用，只需点击鼠标即可设计出一个用户可配置的稳健的超声测距系统。用户可以修改超声波脉冲生成特性以及检测算法以适合工业和测量应用中的特定使用情况，从而让用户能解决其他固定功能传感器的限制，同时增加测量的可靠性。TLV320AIC3268 上的两个 GPIO 被自动触发，表明已发出并接收到超声波脉冲。通过利用主机 MCU 监测这些 GPIO 可以提取出飞行时间。
设计指南: PDF
原理图: PDF
参考设计

TIDA-00385 — 用于便携和智能手机应用的高保真音频耳机回放

随着用于便携音频播放的高保真耳机的兴起，人们开始对更高性能的 DAC 和耳机放大器有了要求。此系统可通过 PCM5242 音频 DAC 将来自 USB、SPDIF 或光盘的数字音频转换成模拟音频。高性能 TPA6120A2 耳机放大器搭配差动 DAC 可实现令人震撼的清晰度和解析力，同时还能提供行业领先的降噪性能，这是实现低噪耳机播放的关键所在。电源架构专为通过 3.3V 电源工作而设计，可提高灵活度并与现有米6体育平台手机版_好二三四和系统相集成。
测试报告: PDF
原理图: PDF
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TQFP (PFB) 48 Ultra Librarian
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订购和质量

包含信息：
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
包含信息：
  • 制造厂地点
  • 封装厂地点

支持和培训

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